SU1554028A1 - Shift register with self-diagnosis - Google Patents
Shift register with self-diagnosis Download PDFInfo
- Publication number
- SU1554028A1 SU1554028A1 SU874311942A SU4311942A SU1554028A1 SU 1554028 A1 SU1554028 A1 SU 1554028A1 SU 874311942 A SU874311942 A SU 874311942A SU 4311942 A SU4311942 A SU 4311942A SU 1554028 A1 SU1554028 A1 SU 1554028A1
- Authority
- SU
- USSR - Soviet Union
- Prior art keywords
- shift register
- inputs
- control
- outputs
- decoder
- Prior art date
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- Test And Diagnosis Of Digital Computers (AREA)
- Debugging And Monitoring (AREA)
- Hardware Redundancy (AREA)
Abstract
Изобретение относитс к вычислительной технике и может быть использовано дл контрол узлов ЭВМ. Цель изобретени - повышение достоверности контрол за счет возможности обнаружени искажени информации в двух соседних разр дах регистра сдвига. Устройство содержит сдвиговый регистр 1, дешифратор 2, сумматор 3 и схему сравнени 4. Введение дешифратора и схемы сравнени обеспечивает обнаружение искажени информации в двух соседних разр дах сдвигового регистра, что приводит к увеличению достоверности контрол работы регистра. 1 ил., 2 табл.The invention relates to computing and can be used to control computer nodes. The purpose of the invention is to increase the reliability of control due to the possibility of detecting information distortion in two adjacent bits of the shift register. The device contains a shift register 1, a decoder 2, an adder 3, and a comparison circuit 4. The introduction of a decoder and a comparison circuit provides for the detection of information distortion in two adjacent bits of the shift register, which leads to an increase in the reliability of control of the register operation. 1 dw., 2 tab.
Description
Выходы сумматора 3 1 1 1 1The outputs of the adder 3 1 1 1 1
Выход ИЛИ 8 :0 - информаци достовернаOutput OR 8: 0 - information is reliable
15540281554028
Продолжение табл.2Continuation of table 2
Выход сумматора 3 1101The output of the adder 3 1101
И7, И7г И7, . H7S И76 И7Т И7,I7, I7g I7,. H7S I76 I7T I7,
II111111II111111
II111OilII111Oil
II 110 И 8 Г: - ошибкаII 110 and 8 G: - error
1 1eleven
1one
Выходы сумматора 3 1 1 00The outputs of the adder 3 1 1 00
И7, И7 И7, И7, И7. И76 И77 И7, IIIII111I7, I7 I7, I7, I7. I76 I77 I7, IIIII111
II II 11 11 И 8 I - ошибкаII II 11 11 And 8 I - error
1 О1 o
ОABOUT
1one
1 О1 o
ОABOUT
1one
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SU874311942A SU1554028A1 (en) | 1987-10-02 | 1987-10-02 | Shift register with self-diagnosis |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SU874311942A SU1554028A1 (en) | 1987-10-02 | 1987-10-02 | Shift register with self-diagnosis |
Publications (1)
Publication Number | Publication Date |
---|---|
SU1554028A1 true SU1554028A1 (en) | 1990-03-30 |
Family
ID=21329998
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SU874311942A SU1554028A1 (en) | 1987-10-02 | 1987-10-02 | Shift register with self-diagnosis |
Country Status (1)
Country | Link |
---|---|
SU (1) | SU1554028A1 (en) |
-
1987
- 1987-10-02 SU SU874311942A patent/SU1554028A1/en active
Non-Patent Citations (1)
Title |
---|
Авторское свидетельство СССР 1C 809П8, кл. G 06 F 11/08, 1979. Авторское свидетельство СССР 679984, кл. G 06 F 11/02, 1978. * |
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