SU1540018A1 - Detector of intervals in system with pulse-code modulation - Google Patents

Abstract

The invention relates to telecommunications. The purpose of the invention is to increase the reliability of speech pauses. The detector contains a register of 1 shift, keys 2-4, 15 and 17, counters 5 and 8, el-OR 6 and 11, trigger 7, decoder 9, inverter 10, driver 12 pulses, el-delay 13 and 14, block the memory 16 and the initial installation unit 18. The goal is achieved by ensuring synchronization of the moment of occurrence of subscriber activity and the beginning of the observation interval. 1 il.

Description

modulation with informational -call reliable allocation of the shortest

25

thirty

channel and channel combination unit

The speech pause detector in a system with pulse-code modulation contains a shift register 1, the first 2E second 3 and third 4 keys, the first counter 5, the first element OR 6, the trigger 7, the second counter 8, the decoder 9, the inverter 10, the second element OR 11, pulse former 12, first 13 and second 14 delay elements 5 fourth key 15, memory block 16, fifth key 17, and initial setup block 18

In addition, the drawing shows the input 19 clock pulses, information input 20, the input 23 of the sampling signal, as well as information channel 22, containing the key 23, and block 24 of channel combination

The speech pause detector in a system with pulse-code modulation operates as follows.

When the device is turned on, the initial setup unit 18 generates a pulse at its output, according to which counter 5 and register 1 are set to the zero state. Signals in the sequential code from an external speech converting device arrive as PCM samples at information input 20 and are written to the register 1 shift with the frequency of the clock signal, which is fed to the input 19 Each PCM sample count is represented by a code combination of K bits. When the high bit of the code combination, the sample carries information about the sign of the speech signal, and the remaining bits characterize its level. Since, in the silent mode due to the background noise, it is possible for units to appear in 3-4 lower bits of code combinations, the information for making decisions about the backhones corresponding to the explosive sounds k, n, b, d and t is d, the duration of which is lies in the range of 20-25 ms, the parameter N is selected in the range from 160 to 2400, which corresponds to the recording in the 1 shift register of information about a segment of speech with a duration from 20 to 300 ms with a sampling frequency of 8 kHz, and the N value is selected from the specified range taking into account the requirements for the value of ass information transfer rzhki. The sampling frequency pulses come from input 21 to input of shaper 13, which forms short pulses of them with a duration of not, and the moments of the pulses at the inputs of keys 3 and 15 are shifted in time by the amount of delay, introduced by 35 delay elements 13, and correspond to the end of the recording of the next PCM reference in the shift register 1 Depending on the control signals coming from the outputs of the OR 6 and 1 1 elements to the inputs of the keys 3 and 15, these pulses are allowed or not allowed to go to the summing and ychitayuschy inputs of down counter 5 5 Content counter corresponds to a current level of a large number of samples stored to / from the shift register 1. The recalculation coefficient K "of counter 5 is selected from the condition Kn N, which excludes the possibility of its overflow and zeroing during operation. The signals from the outputs of counter 5 are fed to the address inputs of memory block 16 (threshold element). storing N one-bit binary numbers If the contents of counter 5 exceeds the set threshold, then the output of the block

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from the selection of the shortest

five

0

P

phonemes corresponding to explosive sounds k, n, b, d and t „d, whose duration lies in the range of 20-25 ms, the parameter N is selected in the range from 160 to 2400, which corresponds to writing to the shift register 1 of information about a segment of speech from 20 to 300 ms at a sampling frequency of 8 kHz, and the N value from the specified range is selected taking into account the requirements imposed on the amount of information transfer delay. The sampling frequency pulses come from the input 21 to the input of the imaging unit 13, which forms short pulses of them with a duration of not, and the moments of arrival of the pulses at the inputs of the keys 3 and 15 are shifted in time by the amount of delay not introduced 5 by delay element 13, of the next PCM reference to the shift register 1 Depending on the control signals received from the outputs of the elements OR 6 and 1 1 to the inputs of the keys 3 and 15, these pulses are allowed or prohibited to enter respectively the summing and reading inputs down counter 5 5 Content counter corresponds to a current level of a large number of samples stored to / from the shift register 1. The recalculation factor К „of the counter 5 is selected from the condition Kn N, which excludes the possibility of its overflow and transfer to the zero state during operation. The signals from the outputs of the counter 5 arrive at the address inputs of the memory block 16 (threshold element). The capacity of the memory block 16 provides storage N one-bit binary numbers If the contents of counter 5 exceeds the set threshold, then the output of the block

0

five

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five

16, in accordance with the address combination, signal 1 is formed; otherwise, the O Threshold (initial address code) is chosen so that the device does not respond to short separate noise pulses with a duration of up to 10 ms and ensure reliable selection of the beginning of words and sense fragments of speech beginning with explosive sounds, the accuracy of the analysis of which significantly affects the intelligibility of the transmitted speech. If we assume that a separately standing noise pulse with a duration of up to 10 ms is represented by only a large level readings, then in this case the contents of counter 5 are 80, Therefore, the threshold starting from which is chosen to be 80 further. Such a threshold ensures the cutting of separately standing noise pulses and also excludes the possibility of cutting off the beginning of subscriber activity even in the case of the shortest phonemes. The output signal from the block 16 controls the passage of short pulses from the output of the delay element 14 through the switch 17 to the S input of the trigger 7 and

pulses through key 17. At the same time, the counter 8 is not reset to zero and counts the pulses received through the public key 4. The counter 8 plays the role of an inertial element that is intended to introduce a delay in the release of the speech channel for about 160–200 ms

after the subscriber transition from activity to silence. To ensure the specified release delay, the recalculation factor of counter 8 is selected in the range of 1040-16000. After the release delay expires, counter 8 counts the set number of pulses, and decoder 9 decrypts its state. In this case, the signal at the output of the decoder 9 changes to the opposite direction, which leads to establish the trigger 7 by the R-input to the zero state. The key 4 is closed by a signal from the output of the trigger 7, which ensures the preservation of

5 counter 8, and consequently, the preservation of the corresponding signal at the output of the decoder 9. Thus, after 160-200 ms after the signal at the output of block 16 received

The input of the setting to zero of the 80 O counter, corresponding to the absence of a delay, introduced by element 14, 600 not, ensures the registration of transients in the reversible counter 5 and the memory block 16. If there is a signal 1 at the output of block 16, which corresponds to the subscriber's activity, the pulses} that follow with the sampling frequency pass through key 17 and set trigger 7 to one, and counter 8 to zero state. The signal from the RS output of trigger 7 permits the passage pulses coming from the output of the delay element 14 through the key 4 to the counting input of the counter 8 When the subscriber is active, the counter 8 does not count, because it is periodically set to zero at the R input by the pulses coming from the output of the key 17 Counter code 8 is identified by a decipher 9 Oromo signal output which allows the passage of information from the output of register 1 via the key 2 to the input of block 24, combining channels. When the subscriber transitions from activity to silence, the contents of counter 5 do not reach the set threshold and the output O prevents the passage at the output of memory block 16.

the subscriber’s activity, key 2 is closed, and key 23 is opened, allowing information from information channel 22 to pass through the input

24 channel combin

Claims (1)

When the subscriber enters the active state, the trigger 7 at the S-input is again set to one and the counter 9-5 is zero. The signal from the output of the decoder 9 is changed to the opposite, which leads to the opening of the key 2 and the locking of the key 23. The formula of the invention Speech pause detector in the system with pulse code modulation containing serially connected shift register and the first key, the second the outputs of the shift register through the first element OR are connected to the input of the second key, the output of which is connected to the first, the input of the first counter, connected in series to the third key, A second switch, a decoder and an inverter, the input of which is also connected to the control input of the first key and the first input of the trigger, the second input of which is connected to the installation input of the second counter, and the output of the trigger is connected to the control input of the third key, characterized in that in order to increase the reliability of detection by synchronizing the moment of occurrence of the subscriber’s activity and the beginning of the observation interval, the pulse shaper, the second OR element, the first and the second OR element, the first and second elements are entered into it aderzhki, fourth and fifth keys unit the initial setting and a memory unit, the input of the pulse shaper is input to the sampling signal, the output pulse shaper is connected to a control input of the second switch and consequently via five the first delay element and the fourth key are connected to the second input of the first counter, the installation input of Oh which is connected to the output of the initial installation block and the corresponding input of the shift register, the third outputs through the second OR element are connected to the signal input of the fourth key, whose input is also connected to the input of the second delay element, the output of which through the fourth key is connected to the second trigger input and the signal input of the third key, the outputs of the first counter are connected to the corresponding inputs of the block a memory whose output is connected to the control input of the fifth key,