SU1522409A1

SU1522409A1 - Decoder

Info

Publication number: SU1522409A1
Application number: SU884395185A
Authority: SU
Inventors: Гусейн Агаларович Ахундов; Тофик Али Икрам Оглы Бабаев; Сергей Вазгенович Мкртычев; Рамиз Тофик Оглы Алиев
Original assignee: Азербайджанское Производственное Объединение Вычислительной Техники И Информатики
Priority date: 1988-02-29
Filing date: 1988-02-29
Publication date: 1989-11-15

Abstract

Изобретение относитс к технике св зи и может быть использовано в декодирующих устройствах систем селективного вызова различных объектов. Цель изобретени - повышение надежности устройства. Устройство содержит блок 1 синхронизации, регистры 2, 3 сдвига, элементы 4 - 6 сравнени , блок 7 управлени , триггер 8, элемент И 9, элемент ИЛИ 10, индикатор 11 вызова и счетчик 12. В устройстве опознание номеров абонентов осуществл етс независимо от направлени сдвига между принимаемыми ПС-последовательност ми. 1 з.п. ф-лы, 2 ил.The invention relates to communication technology and can be used in decoding devices of systems for the selective call of various objects. The purpose of the invention is to increase the reliability of the device. The device contains a synchronization unit 1, registers 2, 3 shift, elements 4 - 6 comparison, control unit 7, trigger 8, element AND 9, element OR 10, call indicator 11 and counter 12. In the device, the identification of subscriber numbers is independent of the direction the shift between received PS-sequences. 1 hp f-ly, 2 ill.

Description

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фиг.FIG.

Изобретение относитс к технике св зи и может быть использовано в де кодирующих устройствах систем селек- тинного вызова различных объектов.The invention relates to communication technology and can be used in de-coding devices of selective calling systems of various objects.

Цель изобретени - повышение надежности устройства.The purpose of the invention is to increase the reliability of the device.

На фиг.1 показана структурна схема устройства; на фиг.2 - структурна схема блока управлени .Figure 1 shows the block diagram of the device; Fig. 2 is a block diagram of the control unit.

Устройство (фиг.1) содержит блок синхронизации, регистры 2 и 3 сдвига элементы А - 6 сравнени , блок 7 управлени , триггер 8, элемент И 9, элемент ИЛИ 10, индикатор 11 вызова и счетчик 12.The device (Fig. 1) contains a synchronization unit, registers 2 and 3 shift A-6 comparison elements, a control block 7, a trigger 8, an AND 9 element, an OR 10 element, a call indicator 11 and a counter 12.

Блок управлени (фиг.2) содержит задающий генератор 13, формирователь 14 импульсов, элемен-т И 15, элементы ИЛИ 16 и 17, триггер 18 и счетчики 19 и 20.The control unit (Fig. 2) contains a master oscillator 13, a pulse shaper 14, an AND-15 element, an OR element of 16 and 17, a trigger 18, and counters 19 and 20.

Устройство работает следующим образом .The device works as follows.

На информационные входы регистровOn the information inputs of registers

в О триггер 18 и запираетin o trigger 18 and locks

И 15. Одновременно устанавли 1 триггер 8. Таким обраливает элемент ваетс в And 15. At the same time, 1 trigger 8 was installed. Thus, the element is injected into

зом, информаци в регистре 3 сдвигаетс до совпадени с содержимым в регистре 2, а количество импульсов сдвига фиксируетс счетчиком 12. В момент совпадени кодов на входах элемента 4 сравнени на его выходе по вл етс фронт импульса, устанавливающий триггер В в О и дающий разрешение на сравнение задающих кодов и выходного состо ни счетчика 12. При совпадении кодов на входах одного из элементов 5 и 6 сравнени на их выходах образуетс сигнал 1, который включает индикатор 11 вызова Если же совпадени кодов не произошло в течение промежутка времени, равного периоду Т ПС-последовательностей , что может иметь место при анализе номера другого абонента ипи ошибке при передаче, импульс с выхоIn this case, the information in register 3 is shifted to coincide with the contents in register 2, and the number of shift pulses is fixed by counter 12. At the instant the codes coincide, the pulse front appears on the inputs of the comparison element 4, setting the trigger B to O and giving permission to comparison of the reference codes and the output state of the counter 12. When the codes coincide at the inputs of one of the elements 5 and 6 of the comparison, a signal 1 is generated at their outputs, which turns on the call indicator 11 If the codes did not coincide during the time interval a period equal to the period T of PS-sequences, which may occur when analyzing the number of another subscriber or an error during transmission, the pulse from the output

30thirty

2 и 3 сдвига по информационным входам 25 переноса счетчика 20 устанавливает схему в исходное состо ние.The 2 and 3 shifts in the information inputs 25 of the transfer of the counter 20 sets the circuit to its initial state.

Таким образом, в устройстве опознание номеров абонентов осуществл етс независимо от направлени сдвига между принимаемыми ПС-последовательност ми , благодар чему достигаетс повышение функциональной надежности при его применении в кабельных системах св зи, например в локальных сет х персональньк ЭВМ.Thus, in the device, the identification of subscriber numbers is carried out regardless of the direction of the shift between received PS-sequences, thereby achieving an increase in functional reliability when used in cable communication systems, for example, in local networks of personal computers.

Claims

Invention Formula

PS-sequences are received, mixed one relative to another in time by the amount determined by the number of the subscriber being called. One of the PS sequences is fed to the second input of the synchronization unit 1. The third inputs of elements 5 and 6 of the comparison are given the codes m and (T - t) corresponding to the number of binary shift bits determined by the given subscriber number and the difference between the period of the PS-sequences and the specified value. When the power is turned on, a Start-up signal is generated, which sets in O the trigger of the synchronization unit 1, the trigger 18 and the counters 19 and 20 of the control unit 7.

The front of the first output pulse of the synchronization unit 1 is fed to the first input of the control unit 7 and starts its master oscillator 13. At the same time, a signal appears in the output of the pulse former 14, which sets trigger to 1 18. Under

35

40

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one . A decoding device containing a synchronization block, an output is connected to the first input of the control unit, the first and second outputs of which are connected to the first inputs of the same shift registers, the bits of the first shift register are connected to the corresponding first inputs of the first reference element, and the indicator call from depriving itself of the fact that, in order to increase the reliability of the device, into it. 50 the second and third elements of the comparison are entered, the logical zero bus, the trigger, the counter, the AND element and the FPI element, the output of which is connected to the input of the call indicator, the third and quarter A

one . The decoding device, the content, the synchronization block, the output of which is connected to the first input of the control unit, the first and second outputs of which are connected to the first inputs of the same shift registers, the outputs of the first shift register bits are connected to the corresponding first inputs of the first comparison element, and the indicator call from depriving itself of the fact that, in order to increase the reliability of the device, into it. 50 the second and third elements of the comparison are entered, the logical zero bus, the trigger, the counter, the AND element and the FPI element, the output of which is connected to the input of the call indicator, the third and quarter A

by the action of the output pulses of the AND 1 5 and the master oscillator 13, the segments of the PS-sequences are entered into registers 2 and 3, the number of bits N of which is equal to the size

registers of generators used by PS-55; the codes of the control unit are connected to sequences. After filling, respectively, with the first input of the block of registers 2 and 3, the front of the pulse for synchronization and the S input of the trigger, during the transfer of the N counter 19 by setting the D input, is connected to the bus

one . A decoding device containing a synchronization block, an output is connected to the first input of the control unit, the first and second outputs of which are connected to the first inputs of the same shift registers, the bits of the first shift register are connected to the corresponding first inputs of the first reference element, and the indicator call from depriving itself of the fact that, in order to increase the reliability of the device, into it. the second and third elements of comparison are introduced, logical zero, trigger, counter, AND element and IPD element, the output of which is connected to the input of call indicator, third and quarter A

five.

trigger zero, the trigger trigger is connected to the first input of the AND element, the output of which is connected to the C input of the counter, the discharge outputs of which are connected to the corresponding first inputs of the second and third comparison elements, the outputs of which are connected respectively to the first and second inputs of the OR element, the output of the first the comparison element is connected to the C input of the trigger and with the second inputs of the second and third comparison elements, the second input of the AND element is connected to the second output of the control unit, the outputs of the bits of the second shift register Inns with the corresponding second inputs of the first comparison element, the second input of the control unit and the R-BXO trigger and counter are combined and are the initial setup input of the device, the third inputs of the second and third comparison elements are the first and second address inputs of the device, the second inputs the synchronization block and the first shift register are combined and are the first information input of the device, the second input of the second shift register is the second information input of the device 5

properties.

224096

2. The device according to claim 1, about tl and - h. The result is that the control unit contains counters, OR elements, AND element, trigger, pulse shaper and master oscillator, the output of which is connected to the C inputs of the counters the input element And is the second output of the block

Q control, the output of the pulse generator is connected to the first input of the first OR element, the output of which is connected to the C input of the trigger, the direct output of which is connected to the second input7.

) 5 house of the AND element, inverse output — with the R input of the first counter, the transfer output of which is connected to the second input of the first OR element and is the fourth output of the control unit; the output of the second OR element is connected to the R input of the trigger and is the third output control unit, the transfer output of the second counter is connected to the first input of the second element

25 OR, the second input of which is combined with the R input of the second counter and is the second input of the control unit, the inputs of the master oscillator and pulse generator are combined and 30 with the first input of the control unit, and the output of the I element is the first output of the control unit.

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