SU1506507A1 - Shaper of fm-signals - Google Patents

Abstract

The invention relates to radio engineering. The purpose of the invention is to increase the stability of the initial frequency and the rate of change of frequency during the formation of coherent frequency-modulated signals of rectangular, triangular and sinusoidal shape. The imaging unit contains blocks 1, 4 of memory, address counter 3, D / A converter 5, reference generator 8, and counter 9 pulses. In order to achieve the goal, a code comparison unit 2, a triangular wave signal converter 6 into a sinusoidal signal, an integration unit 7, two triggers 10, 12 and a reference voltage generator 11 are introduced into the driver. The pulses from the output of block 2 are fed to the first input of the trigger 10, which operates in the frequency division mode by two, so that a rectangular frequency-modulated voltage is formed at its output. At the output of block 7, a triangular oscillation is formed, the amplitude of which is constant. From the output of block 7, a triangular voltage is applied to the input of the converter 6, at the output of which a sinusoidal frequency-modulated signal is formed. 2 Il.

Description

SL Od SP

1506507

The invention relates to radio engineering and can be used as a generator of frequency-modulated signals of various shapes in communication systems and measurement technology.

The purpose of the invention is to increase the stability of the initial frequency and the rate of change of the frequency when the Q-Institute is formed by a scientific research institute of coherent frequency-modulated signals of rectangular, triangular and sinusoidal forms.

FIG. 1 shows a structural electrical circuit forming a 15 L frequency modulated signals in FIG. 2 - time diagrams of the shaper operation.

Shaper frequency modulo is equal to

at the output of block 2

comparing codes on a VITS pulse (Fig. 2c), which will change the state of address counter 3 and, therefore, connect a new cell of memory 1 to the first input of block 2, in which the number “Impulse” from the output of block 2 is written to The first input of the trigger 10, which operates by dividing the frequency into two, so that at its output is formed a right-angle frequency-modulated voltage (Fig. 2d), as well as the second input of the pulse counter 9, setting it to the zero state .

At the beginning of the modulation, trigger 12 is set at the first entry into a single state. At the end of fashion

These signals contain the second block 20, the state of the address counter 1 of the memory, block 2 of the code comparison, 3 corresponds to the number (M - 1) and to the address counter 3, the first block 4

its second output is formed by an overflow pulse (Fig. 2b), which arrives at the second input of the address counter 3, at the second inputs of the trigger 10 and 12, and at the third input of the pulse counter 9, sets them to their initial state. At the same time, at the output of trigger 12, a resolution pulse of frequency modulation (Fig. 2g) is formed, the duration of which is T. At the output of memory block 4 there is a binary equivalent of the number A, constant over the interval. A change occurs by changing the state of the address counter 3.

memory, digital-to-analog converter (CDL) 5, converter 6 of a triangular signal into a sinusoidal signal, integration unit 7, reference generator 8, pulse counter 9, first trigger 10, reference voltage generator 11, second trigger 12.

The shaper works as follows.

In the initial state, the pulse counter 9 and the address counter 3, as well as the triggers 10 and 12 are reset, the contents of the first memory location are passed to the output of memory block 1. It is required to form a signal, the current normalized to 1 phase of which is determined by the function Lf () t where 1 t / T, t is the current time; T is the modulation duration. With the specified parameter normalization, the maximum value is 1, if (1) M / 2, where M is an integer. At times, the function y (t) takes the values

go

4 (J m / 2,

m

1, 2 ... M.

In addition, the time difference is entered. О ™ - О.,.

The current state of the address counter 3 corresponds to the value (t - - 1) and sets the cell address of memory block 1, in which the number f is written. At the input of counter 9, pulses are output from the reference generator 8, following the frequency {. (Fig. 2a). As soon as the number of these pulses becomes equal

at the output of block 2

comparing codes on a Wits pulse (Fig. 2c), which changes the state of address counter 3 and, therefore, connects to the first input of block 2 a new cell of memory 1, in which the number is written ,, Pulses from the output of block 2 arrive at the first input the trigger 10, which operates in the frequency division mode by two, so that a rectangular frequency-modulated voltage is formed at its output (Fig. 2d), as well as the second input of the pulse counter 9, sets it to the zero state.

At the beginning of the modulation, trigger 12 is set at the first input to the one state. At the end of the modulation, the state of the address counter 3 corresponds to the number (M - 1) and

On the 20th, the state of the address counter 3 corresponds to the number (M - 1) and

25

thirty

35

50

-ss its second output generates an overflow pulse (Fig. 2b), which goes to the second input of the address counter 3, to the second inputs of the trigger 10 and 12, and to the third input of the counter 9 pulses, reset them. At the same time, at the output of trigger 12, a resolution pulse of frequency modulation (Fig. 2g) is formed, the duration of which is T. At the output of memory block 4 there is a binary equivalent of the number A, constant over the interval. A change occurs by changing the state of the address counter 3.

The output voltage of the trigger 10 controls the sign of the output voltage of the generator 11. The module of this voltage is DO- At the output of the DAC 5, a voltage equal to UgAp is formed, the sign of which depends on the level of the square signal (Fig. 2d). Low level corresponds to one 45 characters, high - the opposite.

At the output of block 7, a triangular oscillation (Fig. 2e) is formed, the amplitude and which is constant. Amplitude is necessary for normal operation of the converter. 6. The magnitude is A,

40

. is defined by the following relationship:

BUT

From the output of block 7, the triangular voltage is fed to the input of the converter 6, at the output of which a sinusoidal frequency-modulated output is formed (Fig. 2e). At times when the output potential of the trigger 12 is low, the integration unit 7 is zeroed.

Claims (1)

Invention Formula A frequency modulated waveform generator comprising a reference oscillator, a pulse counter, a first memory block, a digital-to-analog converter and a serially connected address counter and a second memory block, characterized in that, in order to increase the stability of the initial frequency and rate of frequency change during the formation of coherent frequency -modulated signals of rectangular, triangular and sinusoidal forms, serially connected code comparison block, the first input of which is connected to the output the second memory block house, the first trigger and the reference voltage generator, the output of which is connected to the control input of the digital-analog converter, are connected in series to the second trigger. The primary WCS of which is connected to the output of the reference generator, the integration unit and the converter of a triangular signal into a sinusoidal signal, while the output of the reference generator is connected to the first input of the pulse counter, the output of which is connected to the second input of the code comparison unit, the output of the code comparison unit is connected to the second input pulse counter and with the first input of the address counter, the output of the overflow address counter is connected to the second inputs of the address counter, the first and second triggers and the third input pulse maker, the input of the first memory block is connected to the output of the address counter, and the output is connected to the input of a digital-to-analog converter, the output of which is connected to the second input of the integrator, the output of the triangular signal converter to a sinusoidal signal being the output of a sinusoidal signal, the output of the integrating unit the output of the triangular signal, the output of the first trigger - the output of the signal of the rectangular form. aSh S 8 I I III I II walked  I F1 / .2