SU1338091A1 - Device for receiving pulse sequence with pseudorandom intervals between pulses - Google Patents

Abstract

The invention relates to radio and provides increased reliability of reception of a pulse sequence with pseudo-random intervals between pulses. The device contains a discriminator 1 delay, a low-pass filter 2, frequency controlled clock clock 4, a shift register 5. The multiplier 3 was again introduced for a variable coefficient proportional to the length of the current interval between pulses, a digital-to-analog converter, and a pulse modulator time 7. 1 sludge. (L 00 from 00 about

Description

The invention relates to radio and can be used in radar and radio navigation.

The aim of the invention is to increase the reliability of reception of a pulse sequence with pseudo-random intervals between pulses.

The drawing shows a structural electrical circuit of a device for receiving a pulse sequence with pseudo-random intervals between pulses.

The device for receiving a pulse sequence with pseudo-random intervals between pulses contains a discriminator 1 delay, filter

2frequency (LPF) multiplier

3a variable coefficient proportional to the length of the current interval between pulses, frequency controlled clock generator 4, shift register 5, digital-to-analog converter (DAC) 6 and time pulse modulator 7.

The device works as follows.

The monitored signal SCt-T), which is a pulse sequence with an unknown delay, is fed to the input of the discriminator 1 delay, to the other input of which the pulse sequence signal arrives from the output of the pulse modulator time. At the output of the discriminator 1 delay, a signal f (i-t) is produced, depending on the difference between the true and estimated delay values, i.e. from the time shift between received and reference pulses.

In order to reduce the interference effect, it serves LPF 2. Due to the fact that the intervals between pulses of a pseudo-random sequence are not the same, the controlling effect of delay signals generated by the discriminator 1 with the same error (1 - t) occurs at different intervals T of the pseudo-random sequence unequal, which can lead to the effect of parametric instability of the system.

To eliminate this effect, the multiplier 3 amplifies the control action at large T intervals between pulses and reduces it at small T. Part of the device, including a frequency controlled clock 4, shift register 5,

the digital-to-analog converter 6 and the time pulse modulator 7 are used to form a reference sequence with pseudo-random intervals between pulses. At the output of the DAC 6, we obtain a pseudo-random number proportional to the length of the current interval between pulses. This value is then converted into intervals between the pulses of a sequence with pseudo-random intervals between pulses during the pulse modulator 7, but the La of the generated sequence, i.e. its time shift is relative to the received sequence, and the intervals between pulses may differ slightly from the nominal value. For their correction (adjustment) is the first part of the scheme.

So, if the pulse of the reference sequence with pseudo-random intervals lags behind the pulse of the incoming sequence, the error signal increases the frequency of the clock generator 4 controlled by the frequency and vice versa (according to the principle of operation of any tracking system).

Claims (1)

Invention Formula A device for receiving a pulse sequence with pseudo-random intervals between pulses, containing a serially connected delay discriminator and a low-pass filter (LPF), as well as a serially connected frequency controlled clock oscillator, characterized in that, in order to increase the reliability of receiving a pulse sequence with pseudo-random intervals between pulses, a multiplier is introduced into it by a variable coefficient proportional to the length of the current interval between them pulses, and serially connected digital-to-analog converter (DAC) and time pulse modulator, while the outputs of the register bits are connected to the corresponding inputs 0 DAC, whose code is connected to one of the multiplier inputs by a variable coefficient proportional to the length of the current interval between pulses, to the other input of which 55 the output of the low-pass filter is connected, and the output is connected to the input of a frequency-controlled clock generator, and the output time of the pulse modulator is connected to the corresponding input of the delay discriminator.