SU1494023A1 - Adaptive tape ticket vending machine - Google Patents

Abstract

The invention relates to a technique for transmitting information and can be used to obtain multiparameter information with high confidence with limited communication sessions, for example, from meteorological satellites, measuring points of the national observation and monitoring network of the natural environment. The purpose of the invention is to increase the speed of information transfer. High accuracy is provided by using two M-sequences of maximum length, the size of which, unlike the known systems, does not depend on the number of transmitted parameters. A high message transfer rate is achieved by reducing information and structural redundancy. For this purpose, additional units of bitwise and synchronous analysis of the essential reference codes and channel addresses are introduced on the transmitting side, generating control signals to trigger four channel M-sequence generators. At the receiving side, in order to convert sets of M-sequences into initial information and address codes, the restoration blocks of the indicated codes are introduced based on shift registers. 2 Il.

Description

one

(21) 4240581 / 24-24

(22) 05.05.87

(46) 07.15.8. Bup. No. 26

(71) Hydrochemical Institute, Rostov-on-Don

(72) V.I. Grubov, I V. Pantyuhii, V.N. King and M.V. Zavolzhensky

(53) 621.398 (088.8)

(36) USSR author's certificate 824262, cl. G 08 C 19/28, 1978.

(54) ADAPTIVE TELE-MEASURING SYSTEM

(57) The invention relates to information transmission techniques and can be used to obtain multiparameter information with high confidence with limited communication sessions, for example, from meteorological satellites, measuring points of the national observation and monitoring network of the natural environment. The purpose of the invention is to increase the transmission speed.

information. High accuracy is provided by using two .M-sequences of maximum length, the size of which, unlike the known systems, does not depend on the number of transmitted parameters. A high message transfer rate is achieved by reducing information and structural redundancy. To this end, additional units of bitwise and synchronous analysis of the essential counting codes and the channel address are inserted on the transmitting side, generating control signals to start four channel M-sequence generators. At the receiving side, in order to convert sets of M-sequences into initial information and address codes, the restoration blocks of the indicated codes are introduced based on shift registers. 2 Il.I

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The invention relates to a technique for transmitting information and can be used to obtain an infomap for limited communication sessions, for example, from meteorological satellites, from measuring points of the observation network and monitoring the natural environment.

The purpose of the invention is to increase the speed of information transfer.

FIG. 1 shows the transmitting side of the system; in fig. 2 - reception side of the system.

The system contains on the transmitting side (Fig. 1) a channel switch 1, redundancy reduction block 2, address encoding block 3, block of significant encoding samples 4, address code shift register 5, essential count code shift register 6, element OR-NOT 7, elements 8 and 9 of the prohibition, zlemeite Y Yu, element NOT 11, first delay element 12 delay, counter 13 of the number of significant samples, block 1A of the buffer memory.

4 with 4; about to with

decoder 15 code of the number of real samples, register 16 of the shift of the end of frame marker, element I 1 7, prohibition element 18. converter 19 codes, block 20 of information pulses buffer memory, generators 21 channel M-sequences, second delay element 22, block 23 synchronization and element OR 24.

On the receiving side (Fig. 2), the system contains a consistent filter 25 of the marker M-sequence, agreed filters 26-28 of information M-sequences, block 29 of synchronization, elements OR 30 and, 31, block 32 of restoring the essential counting code, block 33 of the recovery of the address code, delay element 34, digital-to-analog converter 35, address decoder 36 and keys 37.

The system works as follows.

On the transmitting side, the frame and channel pulses of the synchronization unit 23 control the operation of the switch 1 and the redundancy reduction unit 2, the input of which alternately receives analog signals from telemetric channels. Significant samples from the output of block 2 are transferred to block A and converted to binary codes corresponding to the instantaneous values of the significant samples. In address encoding unit 3, with the arrival of each pulse from synchronization unit 23, the value of the address code is increased by one unit. From the output of the delay element 12, a signal of a substantial count in a time equal to the duration of the formation of address codes and a substantial count in blocks 3 and 4, respectively, produces a match of the parallel codes in registers 5 and 6.

The next channel pulse sets the contents of block 4 to zero, and in block 3 increases the address code by one. At the same time, the shift of the address codes and the significant count in registers 5 and 6, respectively, is carried out. The signals from the outputs of registers 5 and 6 simultaneously arrive from the lower bits to the inputs of the element OR NOT 7, elements 8 and 9 of the prohibition and element 10. And the pulses corresponding to the results of a partial code of the address codes and a substantial count, from the output logic elements 7-10 are fed to the corresponding inputs of the block 20 of the buffer memory information pulses. At the same time, block 13, performed on a binary counter, generates a code of the number of significant samples in the frame. With the arrival of the next frame pulse, the contents of the address encoding unit 3 are set to zero and the code for the number of significant samples is read in parallel form in the buffer memory block 14. In addition, the frame pulse through the delay element 22 sets the block 13 to its initial state. After a certain number of frame pulses, the synchronization block 23 generates a starting pulse that produces a code of the number of essential samples from block 14 to the decoder 15 inputs.

Following the Start pulse, the first channel pulse shifts the contents of register 16 and opens element 17 at one input. Since zero was recorded at the first discharge of register 16, there is no signal at its output and element 1 remains closed at the other input, the signal At its output is absent and the element la prohibition will be opened at the prohibitory entrance. Thus, the clock pulses arriving at its other input produce a bit-wise shift of the contents of the block 20 of the buffer memory of information pulses.

As a result, the channel pulses in the register 16 and clock pulses in the buffer memory block 20 of information pulses form the channel M-sequences of signals until the binary unit signal corresponding to the number of significant samples in this frame is not will arrive at the closed input of the element And 17, which will open and issue a blocking signal to the input of the prohibition element 18, after which the flow of the shifting clock pulses to the block 20 stops and, therefore, The formation of channel M-sequences of signals in the communication line is abbreviated. The pulse from the output of the element And 17

steps onto generator 19, which forms a marker M-sequence indicating the end of a frame.

In addition, the pulse from the output of the AND element 17 counts the code of the number of significant samples in the next frame from block 14 to the decoder 15, and all processes on the transmitting side are repeated.

In the absence of a signal, a significant reference at the third input of the OR-NOT 7 element is equal to one, and at its output is zero, and a false recording of pulses at the first input of block 20 does not occur.

At the receiving side of the M-sequence signals, forming a telemetry frame, are fed to the inputs of Matched Filters 25-28, the structures of which correspond to the structures of the M-sequences used. When the marker M-sequence arrives, the filter 25 responds, the signal from its output starts up the synchronization block 29, which forms frame and channel pulses. The signal from the output of the filter 27, passing through the element OR 27, records

for the first time block 33 recovers 30 synchronization is connected to the first

NIN address code unit. From the output of the matched filter 26, the binary one through the OR element 30 is recorded in the first bit of the substantial counting code recovery unit 32.

A channel pulse from synchronization unit 29 reads in parallel the codes from block 32 to the digital-to-analog converter 35, and from block 33 to the address code decoder 36. The control signal in this case is formed at the output of the decoder 36, whose number corresponds to the number of the received channel word and opens the corresponding key 37 through which the pulse from the output of the digital-to-analog converter 35, corresponding to the instantaneous value of a significant reference on the transmitting side, is sent to the system output.

Claims (1)

Invention Formula An adaptive telemetering system containing a redundancy block on the transmitting side, the first input of which is connected to the first output of the synchronization block, the output of the redundancy block is connected to the first input of the significant sample encoding block, the outputs of the buffer memory block of information pulses are connected to the information inputs of the code converter, the output of which connected to the input of the communication channel, the block of the buffer memory of the samples, the recovery unit on the receiving side of the essential counting code, you Which are connected to the inputs of the digital-to-analog converter, a synchronization unit, so that, in order to increase the speed of information transfer, a channel switch, an address coding block, an address code shift register, a shift register are entered into the system on the transmitting side essential counting code, element OR-NOT, prohibition elements, elements AND, delay elements, counter of the number of essential samples, code decoder of the number of essential samples, end-of-frame marker shift register and element НЫЕ, channel information inputs The main switches are system inputs, the first output of the unit the control inputs of the channel switch, to the first information input of the address-coding block, to the first control input of the counter 35 of the number of significant samples and, through the first delay element, to the second control input of the counter of the number of significant samples, the outputs of the address-coding block are connected to the corresponding information inputs of the shift register of the address code whose output is connected to the first input of the OR-NOT element, to the first inputs of the first and the second element of the ban 45 and to the first input of the first element I, the output of the redundancy block is connected to the first input of the second delay element and to the information input of the counter of a number of 50 L1X samples, the output of the second delay element is connected to the control inputs of the address coding block and the coding block of the number of significant samples and through the element NOT to connect55 it is not - to the second input of the element OR-H the outputs of the coding block are significant samples are connected to the information inputs of the shift register of the code of significant samples, the output of which is connected Inen with the third input of the element OR- NOT and with the second inputs of the first and second prohibition elements and the first element AND, whose outputs j are connected to the corresponding inputs of the buffer memory block of information pulses, the counter outputs of the number of essential samples are connected to the information inputs of the buffer memory block of the reality - Juridical samples, the outputs of which through the code decoder of the number of essential samples are connected to the inputs of the shift register of the end of frame marker, the output of which is connected to the first 15 input of the second element AND, output which is connected to the first input of the third prohibition element and to the first control input of the buffer memory block of essential samples and with the control input of the code converter, the second output of the synchronization unit is connected to the second control input of the buffer memory block of the essential samples and to the first 25 to the input of the information buffer pulses memory buffer block, the third output of the synchronization block is connected to the second inputs of the redundancy reduction block and the channel commutator D3, with the second information input m of the address coding block, with the control of the shift register input of the end of frame marker and with the second input of the second element And, the fourth output of the synchronization block is connected to the control inputs of the shift register. the address code, the shift register of the existing counting code and with the second input of the third prohibition element, the output of which is connected to the second control unit, is 1 POSITIVE input of the information pulse memory unit, at the receiving station 50 5 o o o five In addition, a matched filter of the marker M-sequence has been entered; matched informational M-sequence filters, a jumper element, an address decoder, OR elements, an address code recovery unit and keys, the output of the communication channel is connected to the synchronization unit input through the matched filter sequence , the first output of which is connected to the first clock inputs of the essential counting code recovery block and the address code recovery block, the second output of the synchronization block is connected to the second ones The inputs of the essential countdown recovery block and the address code recovery block and through the delay element are connected to the control input of the substantial count code recovery block, the outputs of the address code recovery block are connected to the de encoder's inputs, the outputs of which are / 1 connected to the first key inputs, output digital-to-analog converter connected to the second inputs of the keys, the outputs of which are the outputs of the system, the output of the communication channel is connected to the inputs of the matched information filters M-pos The outputs of the first and second of which are connected to the first inputs of the first and second OR elements, to the second 14 inputs of which are connected the output of the third filter of the information M-series, the outputs of the first and second elements of the YSH are connected respectively to the information inputs of the recovery unit of the reference code and block recovery code address. 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