SU1439673A1 - Apparatus for displaying symbolic and graphic information - Google Patents

Abstract

The invention relates to automation and computer technology and can be used in display devices on gas discharge display panels (PNs), information on which is output from a computer. The purpose of the invention is to expand the field of application by scaling the displayed characters. The goal is achieved by the fact that in the device containing the scan counter 1,

Description

(L

4ib

CO with 65

sl

with

left 2 and second 17 decoders, first 3 and second 5 groups, GIL A, memory block 7, first register 6, 25 rows row 5 first 8 and second 18 switches, character generator 9, row counters) 0 and columns 11 familiarity, first divider 12 frequencies, the third 21, the fourth 24 and the fifth are entered

30 switches, second 27 and third 28

I

registers, comparison block 26, RS-trigger 19, second frequency divider 13, six elements AND 14, 15, 22, 23, 27, 32, counter 31 columns, OR element 16, which provides the display of characters in scale, the display of one and more continuous graphs, displaying combined sign information. 1 il.

The invention relates to automation and computing, in particular, to indicator devices, and can be used in devices for outputting information from a computer.

The aim of the invention is to expand the field of application of the proposed device by providing the possibility of scaling the display characters,

The drawing shows a structural diagram of the proposed device.

 The device contains a scan counter 1, a first decoder 2, keys 3 of the first group, a gas discharge display panel (GIL) 4, keys 5 of the second group, first register 6, memory block 7, first switch 8, character generator 9, counter 10 lines familiarity, counter 11 columns familiarity, first 12 and second 13 divide- and frequencies, third 14 and fourth 15 elements AND, element OR 16, second decoder 17, second switch 18, PiS-trigger 1 9, fifth element 20 the third switch 21, the first 27 and the second 23 elements And, the fourth switch 24e, the counter 25 lines, block 26 comparison , second 27 and third 28 perrt-. str, pulse shaper 29, fifth switch 30, counter 31, column coVe, sixth element AND 32, besides the device has input 33 (mode), third information input 34 (sign code), input 35 (scale), input 36 (start) , the first information input 37 (initial ordinate Y), the second information input: input 38 (initial abscissa XH) and output 39 (End

records) i the first and second clock inputs of the device.

The device can operate in two main modes: recording information (includes four sub-modes — memory zeroing, writing characters, recording continuous graphs, recording graphic information that is not a continuous graph) and displaying it. In the recording mode, the information to be played is stored in the memory unit 7 and stored there during the display time. All bits of the memory block 7 are in strict accordance with the cells of the display panel. At the same time, the addressing of the memory block 7 is constructed according to the coordinate principle: each bit is addressed by row 25 and column 31 counters and corresponds to a GIL cell having the same coordinates on the panel (in the device, the reference cell is located in the lower left corner of the indicator ). For a panel with a number of cells (m is the number of horizontal tires, n is the number of vertical tires of the GIL), the counter of 25 rows has m states, and the counter of 31 columns has n states. In the display mode, as the counter codes 25 and 31 increase, information is sequentially bit-read from memory block 7 in order, corresponding to the following sequence, of the panel cells: from bottom to top along vertical spikes and from left to right along horizontal lines of the GIL, i.e. during the display of one frame, the counter of 25 lines passes all its states n times, and the counter of 31 columns passes once.

The device in the recording mode information works as follows.

At the initial moment of time, a code is applied to the input 33 of the device, which sets the recording mode and the sub-mode that defines it. Codes of the initial ordinate (Y) are fed to the inputs 37 and 38 of the device in all sub-modes.

Acquaintance on the GIL (for the coordinates of enz-comest the coordinates of the extreme left upper cell of the rectangular region of the GIL occupied by the familiarity are taken). The code 34 is inputted to the input 34 of the device, to the input 35, the course of its display scale. The code of the sign arrives at the first input of the sign of the initial abscissa (X ..). The operation of device 10 of the rator 9 and determines the output from the area in different recording modes has its own differences.

In the memory reset mode, the codes "and" are equal to zero, the first inputs of the first 8, third 21, third input of the second 18 and the second input of the fifth 30 switches are open. Through the input 37 of the device into the reversible counter, 25 lines enter the code Y 0, and through the sixth input 38 into the counter 31 abscissas

enter the code X., 0. Then the input

H

36 of the device, a Start signal is set, which sets the RS flip-flop 19, and the incremental input of the reversible counter is 25 lines through the third switch 21, as well as the input Record of memory block 7 from the output of element 20 And the clock pulses TI1 begin to flow at the same time, a logical zero level is applied to the information input of the memory block 7 from the output of the first switch 8. On the front of the TI1 clock pulse in memory block 7, starting with the address Х „0, Y О, zero information is written, and on the slice, the increment of the reversible counter is 25 lines. After all the cells of the memory block 7 corresponding to the first column of the GUI 4 have been reset, the 25 row counter overflows, and the overflow pulse through the fifth switch 30 causes an increment of the counter of 31 columns, the device starts resetting the cells of the memory block 7 corresponding to the second column of the GUI 4. Next, the zeroing process continues similarly and ends when the counter of the 31 columns overflows, the overflow signal from the second output of which is second SECOND switch I8 goes to the R input of the RS flip-flop 19 and resets it to the original a hundred of.

In the submode of writing characters open 25

cogenerator 9 information about the illumination of the GUI of this particular sign. The row counter of familiar places 10 and the columns of the sign of the comet 11 provide a bitwise sweep of information about the illumination of the sign by the columns of the familiarity in the following order: from top to bottom along the lines and from left to right by the columns of the sign of the comest. The number of states of the lower bits of the counter 10 (first output) is equal to the number of cells in the familiarity column at the smallest display scale, and the number of states of the counter 11 must not be less than the number of familiarity columns plus one at the same scale.

Consider the operation of the device in this sub-mode with the scale of the display I: 1 (the smallest displayed

30 scale).

The Start signal is set to 1 RS-flip-flop 19 and the fifth element I 20 is opened. On the front of the first TI clock pulse in memory block 7, a bit of information is written to address X, U. A reverse counter is sent to the slider of TI1 25 rows and increment counter 10 lines is a sign that prepares the counters 25 and 10 to write information about the highlighting of the next familiarity cell in the memory block 7. The process then proceeds similarly until it overflows.

45 least significant bits of counter 10 (i.e., until the end of the recording of the highlight bits of the first column of the familiarity).

After recording the information on the first gQ column of the familiarity on the signal front from the second output (high bit) of the counter of 10 rows of familiarity, an increment of the contents of the counter of 11 columns of the familiarity occurs and through

35

40

You are the third of the first 8, the second input is the 55 element OR 16 and the fifth switch of the second is 18, the fourth inputs of the third are 30 increments of the counter 31 columns. 21 and 30 additional switches and the first one. The same signal goes to the second input of the fourth switch 24, codes the input of the character generator 9, blocking

its output (set at the output

Y., and Chi correspond to the coordinates

Acquaintance on the GIL (for the coordinates of enz-comest the coordinates of the extreme left upper cell of the rectangular region of the GIL occupied by the familiarity are taken). The code 34 is inputted to the input 34 of the device, to the input 35, the course of its display scale. The code of the sign arrives at the first entry

cogenerator 9 information about the illumination of the GUI of this particular sign. Counters of familiarity 10 rows and commerce 11 columns provide a bitwise sweep of information about the sign highlighting by familiarity columns in the following order: from top to bottom along the rows and from left to right along the familiarity columns. The number of states of the lower bits of the counter 10 (first output) is equal to the number of cells in the familiarity column at the smallest display scale, and the number of states of the counter 11 must not be less than the number of familiarity columns plus one at the same scale.

Consider the operation of the device in this sub-mode with the scale of the display I: 1 (the smallest displayed

scale).

The Start signal is set to 1 RS-flip-flop 19 and the fifth element I 20 is opened. On the front of the first TI clock pulse in memory block 7, a bit of information is recorded at address X, U. and the increment of the counter is 10 lines of familiarity, which prepares the counters 25 and 10 for recording information about the highlighting of the next familiarity cell in memory block 7. The process then proceeds similarly until overflow.

the lower bits of counter 10 (i.e., until the end of the recording of the highlight bits of the first column of the familiarity).

After recording the information on the first column of the familiarity, the front of the signal from the second output (most significant bit) of the counter of 10 rows of familiarity is the increment of the contents of the counter of 11 columns of familiarity and

the element OR 16 and the fifth switch 30; the increment of the counter is 31 columns. The same signal is fed to the second input of the character generator 9, blocking

its output (set at the output

logical level zero). and allowing the passage of TI1 clock pulses through the fourth element I 15 to the incremental input of the reversible counter of 25 lines, ensuring its return to the code Uts. At the same time, the TI1 clock pulses, arriving at the counting input of the counter, 10 lines of familiarity, ensure its return to the initial state (zeros on the first and second outputs of the counter). At the same time, zero information is entered in memory block 7 at addresses corresponding to the coordinates of the second column of familiarity (in the direction of increasing ordinates). After the counters 10 and 25 return to their initial state, the process of recording information from the second column of the familiarity begins, similarly to writing the first, etc. . After the information about the illumination of all columns of familiarity is recorded in memory block 7, the front of the positive signal from the second output of the counter 10 rows of familiarity is similar to the specified one, the increment of the contents of counters 1 and 31 is followed by the return of counters 10 and 25 to the initial state, on the cut of this signal, the second decoder 17 ends of the sign formation. The signal from the output of the second decoder 17 sets to zero the row counters of familiarity 10 and the columns of familiarity 11, resets the second switch 18 of the RS flip-flop 19 to the initial state and through the OR element 16 and the switch 30 increments the counter 31 (as a result, 25 and columns 31, the coordinate codes of the next familiarity are set in the same line).

The device provides automatic transfer to a new familiarity in line. This eliminates the need to pre-enter the Y and X codes in the device by recording the subsequent character on the same line as the previous character.

To display large format characters, a scale code K is applied to the input 35 of the device, which is fed to the control inputs of frequency dividers 12 and I3. As a result of the operation of dividers 12 and 13, information about the sign is recorded in the memory block 7 with the format of this sign enlarged K times. This is achieved by K-

396736

multiple repetition of each information point in the familiarity column and K-multiple repetition of each

g of the familiarity column in the process of reading it from the character generator 9 and writing to the memory block 7. Accordingly, the gap between familiarities is increased by a factor of K. .

10 In the submode of recording non-linear plots, the second input of the first 8, the third input of the third 21 and the first inputs of the second 18 and fifth 30 switches and the second input of the fourth switch 24 are open. The ordinate code of the first point of the Uz chart is fed to the input 37 of the device, its abscissa code is Hz. When submitting the initial code of the ordinate

20 is written to counter 25 and a third register 28 of the current value code.

ordinates Y, then the initial abscissa X is written to the counter 31 and the Y-value is overwritten at the same time, the second register 27 of the code

one

the previous value of the ordinate Y |.

The Start-up signal is set to, from the RS flip-flop 19, the n - 1TH element AND 20 is opened. On the front of the first 0 1st sync pulse TI1, the backlight bit of the GUI 4 cell at address X ... Y is written to memory block 7. PON AND

how much is the content of the second register 2 (Y.,) in this case equal to the reversible counter held

rows (YK), then, at the cut of the first clock pulse ТИ1, a signal appears at the output Equal to the comparison block 26, which increments the column counter 31, overwrites the Y value from the third register 28 to the second 27, resets the RS flip-flop 19 and stop recording.

Since stopping the recording of an auto5 magically increments the contents of counter 31, when recording the second and subsequent points of the graph, only the Y values can be fed to the device, which additionally simplifies the output of the continuous graphs. from an external control device. If the subsequent adjacent values of the YII and Y ordinates are equal, then the scheme works similarly to the indicated one.

five

When,

if y ..

P

Y

K-1

then a signal is produced at the output Less than comparison block 26, which permits the passage of sync pulses TI1 through

the second element is And 23 and the fourth commutato. p 24 to the decrement input of the reversible counter of 25 lines. In this case, logical units are recorded in memory block 7 when the address at the output of the reversible counter of 25 lines changes from Y to Yj with the same X coordinate, i.e. until the contents of the counter 25 compare with the code Y | ,, stored in the second register 27. In this case, the comparison block 26 acquires the signal Equal and the write cycle ends similarly to the one indicated.

If Y Y | A signal is produced at the output of More Comparison Unit 26, which permits the passage of sync pulses through the first element 22 and the third switch 21 to the incremental input of the reversible counter of 25 lines. In this case, logical units 1 are recorded in memory block 7 as long as the contents of the counter are incremented (increment, addresses of memory block 7). Over the cuts of these clock pulses, information about the illumination of the PN 4 cells is sequentially recorded in the first register 6. The capacity of the register 6 (the number of information outputs) is equal to the number of lines of the PN 4. In the process

10 increases the content of the counter 25 from O to n in register 6, information about the illumination of the entire panel column with the abscissa determined by the contents of the counter 31 is compiled. When the SRI of the counter of 25 is overflowed 15 (the end of writing to the register 6), the overflow pulse starts the driver 29, which covers 32 for the time required to reliably illuminate the 20 pillar column of the panel (“information about

The backlight of the column enters through keys 5 of the second group on GUI 4 and is displayed there. The overflow impulse also comes through the fifth link 25 does not become equal to Y,. According to the indicator 25, the counter is 31 columns and innals. Equal to the write cycle ends.

In the sub-mode, the recording of graphic images is done point by point.

writing to memory block 7 of any image - 30 liters 29) the contents are incremented on the GUI screen in a manner similar to recording the first point of the graph (with an arbitrary coordinate) in the submode of recording continuous graphs.

The proposed device allows sequentially in various sub-modes to record the most diverse information in memory block 7. As a result, an arbitrary combination of characters of various 40 ka 31 can be displayed on GUI 4.

formats, unabated graphs and other- Glinting images by displaying graphic information. Lead columns are achieved by selecting

The device in the information display mode operates as follows of the corresponding ratio of the period (T) of the clock pulses ТИ2 (Тти2) and

zom.

In this case, the display mode code is supplied to the device input 33, as a result of which the second input of the third 21 and the third input of the fifth switch 30 and the sixth element 32 are opened. The memory block 7 is in the Read mode. In the initial state at the output of the driver 29, the illumination of the panel column is a logic zero level.

I-

TI2 display clock pulses

through the switch 21 is fed to the incremental input of the counter 25, according to their

The fronts are incremented by the counter (increment, addresses of the memory block 7). Over the slices of these clock pulses, information about the illumination of the cells of the PN 4 is sequentially recorded in the first register 6. The capacity of the register 6 (the number of information outputs) is equal to the number of lines of the PN 4. In the process

to increase the content of counter 25 from O to n, register 6 registers information about the illumination of the entire panel column with the abscissa determined by the contents of counter 31. When counter 25 overflows (recording to register 6), the overflow pulse starts the driver 29, which covers the circuit 32 and the time required to reliably highlight the panel column (

The backlight of the column enters through keys 5 of the second group on GUI 4 and is displayed there. The overflow pulse also flows through the fifth switch 30 to the counter of 31 columns and increments it, preparing it to read the information about the next column. Cutting off the pulse of the panel column's column (from the sweep counter I scanner south prepares it for displaying the next column, the element 32 simultaneously opens and further the display process 35 proceeds similarly. To ensure synchronous operation of the column counters 31 and sweep 1, a link from the output overflow of counter 1 to the reset input of the counter

the corresponding ratio of the period (T) of the TI2 (TI2) sync pulses and

/ polob (at about TTi2 at about 15

time).

-nOAC

0

Thus, the display device allows for the following possibilities to be controlled by an external device, for example a computer: cleaning the screen and the GUI (resetting the memory unit); display of characters in the usual format; the format increased by K times - simultaneous display of characters of different formats, automatic transfer to a new familiarity (which is important when outputting an array of character information from a computer); display

one or more continuous graphs stored in a computer in a permissive manner of samples of the process under study displaying an arbitrary graphic information composed of individual points; output and display of combined enacographic information, including cases of image overlay.

Claims (1)

Invention Formula A device for displaying character information containing sequentially connected scan counter, first decoder and keys of the first group, all of which are connected to the vertical tires of the discharge display panel, whose horizontal tires are connected to the output of the column counter, are installed on the keys of the second group , the inputs of which are connected to the outputs of the first register, the first switch, the output of which is connected to the information input of the memory block, the control input of the first switch is device mode control input, character generator, column counter, first frequency divider whose output is connected to the counting row counter familiar input, column familiar counter, second switch second decoder is characterized in that in order to expand the scope by providing the possibility of scaling the displayed characters It contains the third, fourth and fifth switches, six AND elements, the comparison unit, the second frequency center ,. RS trigger, row counter, pulse generator, second and third registers, the information input of the third register is the first information input of the device, and the output is connected to the information of the MaiiHOHHOMy input of the second register, the output of which is connected to the first information input of the comparison block j of the second the information input of which is connected to the first address-input of the memory unit and to the output of the row counter, the installation input of which is connected to the first input of which is the second information input of the device, and the counting input the input is connected to the output n of that switch, the second and the third 25 information inputs of which are connected to the overflow output of an ordinate counter connected to the input of a pulse shaper, the output of which is connected to the first input of the sixth 30 And to the counting input of the sweep counter, the overflow output of which is connected to the reset input of the column counter, the second input of the sixth And element is the first clock input of the device, and the third input of the sixth And element is connected to the input of the device mode control, the output of the sixth And element connected to the control input of the first register and to 40 to the second information input of the third switch, the third and fourth information inputs of which are connected to the outputs of the first and fourth elements, respectively, and outputs g of the third and second elements AND are connected respectively to the first and second information inputs of the fourth switch, the second inputs of the third and fourth elements AND are connected to the first input of the OR element, to the clock input of the second frequency divider, to the familiarity line counter overflow output and to the character generator control inputs and second 50 the device's diagonal input, the sum-gg encoder, the information input of which the pshchik and subtracter inputs of the counter go are connected to the first address input of the lines connected to the outputs of the third character generator and the output of the counter and fourth switches of the corresponding columns, the output of the second controllable the inputs of which the sub-decoder is connected to the reset inputs connected to the output Device mode and connected to the control inputs of the second and fifth switches, the first information inputs of which are connected to the control input of the second register and with the output Equal to the comparison unit, the outputs More and Less are connected to the first inputs of the first and second elements, respectively , the second inputs of which are connected to the clock input of the first frequency divider, with the first inputs of the third and fourth elements And, with the first information input of the third switch, with the output of the fifth element And and with the ravl yuschim input memory block, the second address input of which is connected to The current input of which is the second information input of the device, and the counting input is connected to the output of the fifth switch, the second and third 5 information inputs of which are connected to the overflow output of an ordinate counter connected to the input of a pulse shaper, the output of which is connected to the first input of the sixth 0 of the AND element and the counting input of the sweep counter, the overflow output of which is connected to the reset input of the column counter, the second input of the sixth AND element is the first clock input of the device, and the third input of the sixth AND element is connected to the input of the device mode control, the output of the sixth AND element connected to the control input of the first register and to 0 to the second information input of the third switch, the third and fourth information inputs of which are connected to the outputs of the first and fourth elements, respectively, and outputs g of the third and second elements AND are connected respectively to the first and second information inputs of the fourth switch, the second inputs of the third and fourth elements AND are connected to the first input of the OR element, to the clock input of the second frequency divider, to the familiarity line counter overflow output and to the character generator control inputs and second de0 row and column counters familiarity with the second information input of the second switch, the third information input of which is connected to the overflow output of the column counter, and the output of the second switch connected to the input Setting the RS flip-flop zero and to the second input of the OR element whose output is connected to the fourth information input the fifth switch, the second address input of the character generator is connected to the familiarity row counter, the information input of the character generator is the third information input house devices that control the inputs of the first and second the frequency dividers are the device scale input, the output of the frequency divider is connected to the counting input of the column counter familiarity, the input Setting the RS trigger unit is the input of the device Start the RS trigger output is the output of the device recording end and is connected to the first input of the And element, the second input of which is the second clock input of the device, the first and second information inputs of the first switch are connected to the zero potential bus, and the third information input is connected to the output rrator.