SU1343440A1 - Device for representing information on cathode-ray tube screen - Google Patents

Abstract

The invention relates to the field of computer technology and can be used to construct devices for displaying symbolic-graphic information and computer operator dialogue. The purpose of the invention is to increase the speed of the device - by introducing a serially connected address decoder, a third AND element, a space counter, a character decoder and a fourth AND element and the corresponding functional connections. 1 il. (L with

Description

one

The invention relates to computing and can be used to construct devices for displaying symbol-graphic information and computer operator dialogue.

The purpose of the invention is to increase the speed of the device.

The drawing shows the functional diagram of the device.

The device contains a mode 1 trigger, an AND 2 element, a 3-line decoder, a control trigger 4, a mode switch 5, a character generator 6, a code converter 7, a memory block 8, a shift register 9, an address switch 10, an address counter 11, an address decoder 12, element And 13, the counter 14 spaces, the decoder 15 characters, the elements And 16 and 17, the master generator 18, the counter 19 characters per line, the counter 20 television lines in the sign line, the counter 21 significant lines, generator 22 horizontal scanning, generator 23 frame scanning and electric 25 if it is installed in G. So the reverse beam tube (CRT) 24 "

The device works as follows

 When a signal arrives from a computer, the trigger schedule 1 of the mode is translated into one state and prepares a control trigger 4 for switching on, which is set to one state (with the corresponding, its mode of displaying graphs) through the AND 2 element with a 0 signal, the sign from the decoder 3. Last processes the information from the counter of 21 character lines, which is controlled by the counter of 20 television lines. Trigger 4 is the main control element of the Graph-Symbol mode, From the 0th sign line through (n-1) -th inclusive trigger 4, affecting the mode switch 5, allows the passage of signals from the 9-shift register to the CRT 24 video input, Trigger 4 modes are turned off by the signal of the p-character line from the decoder 3 and switches the device to the display mode of characters from the nth sign line and to the end of the frame, allowing the CRT 24 signals to pass through the signal generator 6 through the converter 7 codes and switch 5 .

In block 8, the memory is stored from the computer byte-by-by-one about the display of points on the screen.

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display and character information. The display of graphic information is performed sequentially along the lines of the raster scan. For maximum savings, the beam illumination is controlled in the memory display in two ways, which are encoded in the high eighth bit of each byte. If in

ten

15

20

the higher de byte is O, then, without highlighting the beam on the screen, it is necessary to skip such a number of familiarity in the TV line, which is stored in the whole form in the lower seven bits of a byte. If it is 1 in the higher order, then at least one point should be highlighted within the current familiarity. In the lower seven bits, the order of highlight points on the screen within this familiarity is indicated. Each point of familiarity corresponds to a separate byte of the byte, the point is highlighted.

0

g,

0

five

0,

five

By this, it is possible to highlight points with high resolution at minimal memory costs (with maximum speed). The last special control code (all bits contain O) is transferred to the waiting for the end of the floor of the screen allocated for the graph, i.e., to the nth sign line, i. So, at the beginning of the forward run of the horizontal scan 0 TV line counter 11 through the switch 10 selects from the memory block 8 the first control bytes. This byte enters the decoder 12, which determines where to enter the information from memory block 8; in the register 9 shift or in the counter 14 spaces. If the higher eighth byte de byte contains the logical 1, then the decoder 12, acting on the control input of the shift register 9, permits the recording of information from the memory block 8 into it. Then, the parallel information recorded in the shift register 9, successively bit by bit through the switch 6, is supplied with signals from the master oscillator. 18 to the video input of the CRT 24. No information is recorded in the 14-gap counter, and it is in the zero state. The decoder 15, the effect of one of its outputs on the element 16, allows the passage through it of the signal from the master oscillator 18.

As a result, the counter 11 changes its state to 1 and selects the next cell of the memory block 8. If the selected eighth byte in the selected memory cell contains a logical O, decoder 12 affects AND 13 and allows passing through it to the clock input of counter 14 gaps from the master oscillator 18. As a result, a seven-bit code is written to counter 14 , indicating the number of empty familiarity (from 1 to 127), and the decoder 15 closes the element AND 13 And in the next clock of the generator 18 the information is not entered into the counter 14 of the gaps. The decoder 15 opens the element I 17, and pulses are transmitted to the subtracting input of the counter 14 from the rear of the generator 18 with the frequency of following the characters in the television line. The subtraction from counter 14 is performed only during the forward path of the beam, which is ensured by valveing element I 17 with a signal from a counter of 19 characters in the television line. During the counting in the counter 14, the gap and during the return path of the beam element 1 and 16 are closed by signals from the decoder 15 and the counter of 19 characters in the television line, respectively, and the counter 11 retains its value. During the counting time of the counter 14 spaces, not a single point is displayed on the display screen, since the shift register 9 contains zeros. When the counter reaches 14 gaps of zero value, the decoder 15 opens the element AND 16 and the next memory cell is selected with a signal from the master oscillator 1E. The process of displaying graphic information continues until the next cell of the memory does not have a code containing logical O in all bits. In this case, the decoder 12 closes the AND 16 element and no further sampling of the cells from the memory block 8 is performed.

From the p-th character string, the control trigger 4 is switched to the Character mode, which is saved to the end of the frame, and the display operates in its normal character mode. The process of displaying character-graphic information continues until the trigger 1 of the mode is reset.

Claims (1)

An apparatus for displaying information on a cathode-ray tube (CRT) screen containing serially connected mode trigger, whose inputs are the Graph and Reset inputs, the first And element, the control trigger and the mode switch connected to the CRT modulator, respectively the second element, And, the address counter, the address switch, the memory block, the generator and the code generator, are successively the connected master oscillator, the character counter in the string and the line scan generator, the serially connected counter of character strings Q and a frame scan generator, a line decoder and a shift register, the first input of which is connected to the output of the memory unit, the second input of the mode switch is connected to the output 5 code converter, the output of the character counter in the line is connected to the input of the television line counter in the sign line and the second input of the address switch, the first input of the second AND element is connected to the output of the master oscillator, the output of the sign line counter is connected to the third input of the address switch and the row decoder input , the first and second outputs of which are connected to the second inputs of the first element I and the control trigger, respectively, the outputs of the horizontal and vertical scan generators are connected to the deflection system of a CRT The control trigger output is connected to the fourth input of the address switch and the second input of the address counter, characterized in that, in order to increase the speed of the device, it contains a series-connected address decoder, the second output of which is connected to the second input of the shift register, the third And element, a space counter, a character decoder and the fourth element I, the second input of which is connected to the output of the character counter in the line connected to the second input of the second element I, and  its output is connected to the second input of the gap counter, the third and fourth inputs of which are connected respectively to the outputs of the control trigger and the memory block, the input of the decoder ad5 0 Rez is connected to the output of the memory block, the third output of the address decoder is connected to the third input of the second element, And the second output of the character decoder is connected to the fourth input of the second and second input of the third. reset Tjj aeQf1 L; / g - 1D J P / 2 Nulls And, respectively, the output of the master oscillator is connected to the third inputs of the third and fourth elements AND and the shift register, the output of which is connected to the third input of the mode switch. k four. rT-CJ - hch Vv / 22 g / V fi Jl g  J - L  3 PZ  Jm | Mu /(9  vjc1n -f TfiiAJi J / 5 i ifT g p