SU1425638A1 - Data input device - Google Patents

Abstract

The invention relates to computing and communication technology and is intended to enter information in the form of multi-site control commands. The aim of the invention is to increase the reliability of the information by introducing information display units, allowing the operator to control the accuracy and completeness of the input data. The device contains a pulse generator, a counter, a multiplexer, a first decoder, a block of switching elements, a bounce block for contacts, a register, an And element, a second decoder, a group of registers, a group of shift registers, blocks of keys, blocks of indicators. To update the command record or correct the erroneously entered data, it is necessary to repeat the procedure for entering the code. 1 il. i cl

Description

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The invention relates to computing and communication technology and is intended to enter information into the world of multiple control commands.

The purpose of the invention is to increase the reliability of the input information.

The drawing shows the block diagram of the device.

The device contains a pulse generator 1, a counter 2, a multiplexer 3, a decoder 4, a block 5 of switching elements, a block 6 for eliminating contact bounce, a register, an element 8, a second decoder 9, a group of shift registers 10, a group of registers 11, blocks 12 keys, blocks of 13 indicators.

The device works as follows.

The information entered is a set of address instructions and the actual data, i.e. consists of the command name and the numeric (letter) values of this command. This is most pronounced in control devices, when the social calculator realizes the control of a specific object by well-defined control commands that have a functional name, for example, in radio communication systems, it is the transmission frequency or the selective call number, the pre-recorded program number, the power level and etc.

To exclude (reduce) errors due to oniepaTOpa in these cases, a system for displaying the input information is necessary, allowing the operator to control the correctness and completeness of the input data, especially key parameters, such as (for our example) frequency.

From generator 1, the pulses through element 8 come to counter 2, at the output of which all possible states of counter 2 are successively and periodically inserted, the number of which is equal to or greater than the number of possible switching elements of unit 5, and each of the switching elements is assigned one of possible states (combinations) of the counter 2.

The decoder 4 sets a subset of the states of counter 2 and passes the signal to the corresponding bus of block 5

The multiplexer 3, within the selected subset of states, scans the vertical buses of the block 5, examines their state, and in case of a signal, outputs it to the bounce contacts block 6.

Block 5 switching elements contains switching elements

Q whose total number is determined by the selected alphabet, and each element corresponds to a code unique to it. Block 5 also includes switching

5 elements, conditionally divided into command, and data elements (command values). When any switching element is closed, horizontal and vertical busbars are connected in accordance with the location of the element in the switching matrix.

Thus, when the switching element of the block 5 is closed, the state of the decoder 4, multiplexer 3 and the corresponding counter code 1 and 2 in register 7 are fixed, while the counter 2 stops until the switching element is released. The moment of fixation corresponds to the moment of arrival of the signal from the output of block 6 averaging contact bounce.

The contact debounce unit 6 generates a signal coming from the multiplexer 3 with a certain delay, exceeding the transient time (the debounce time), thus eliminating failures during high data. Element AND 8 does not prevent the passage of the signal to the synchronizing input of counter 2 from the output of generator I, except for the time that the switching elements of the block 5 are pressed, which leads to blocking of the signal on the element AND 8.

The control commands (address), arriving at the decoder 9 address commands, are allocated and arrive at the corresponding shift register 10,

0 reset it to the initial zero state, which leads to the disconnection of the key block 12, and the block of 13 indicators does not highlight the corresponding information. This provides preparation for recording the data accompanying this command. Then, as you enter the next values of the multi-poem data, register 10 shift from

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each clock cycle advances a single (allowable) level towards the higher bits, thereby ensuring the opening of the next key in block 1 2 and writing the next position of the data in the data register 11. Writing to data register 11 is performed by positive edges of pulses from the output of shift register 10. In turn, writing to the storage register 7 occurs on the positive edges of the pulse from the contact bounce block 6, and the information in the shift register 10 is advanced on the negative edges of the same pulses. This ensures synchronization of the moments of recording in the storage register 7 and the subsequent rewriting of information into the data register 11 through the shift register 10. The advancement of a single level to shift register 10 occurs due to the permanent connection of its information input with a single logic level (not shown in the diagram).

To update a command entry or correct erroneously entered data, you must repeat the procedure for entering a command again.

The introduction of other commands, the number of which may be n, is carried out similarly to that described. It should be noted that when recording other commands, for example, the command corresponding to the first blocks 10-13, the states of the remaining blocks (10-13) remain unchanged, i.e. storing information previously recorded in them.

In order to enable the operative change of instruction codes in the decoder 9, the latter can be made in the form of a storage device whose address inputs are the inputs of the decoder 9, and the contents of the storage device corresponding to the address combinations are output code words with single bits .

The individual bits for each address combination are different and correspond to the outputs of the decoder 9. The indicator elements of block 13 (alphabetic or numerical familiarity) highlight the values of the corresponding bits of the positions of the data register 11 only if the key of the block

12, corresponding to this familiarity, is open.

Thus, when entering information from the operator, it is possible to control the completeness and correctness of the entered control commands and, if necessary, correct (correct) the mistakes made. In addition, the device allows you to display and store information about previously entered information, which is especially important in case of a long-term pererash between regular sessions of information input.

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Claims (1)

Invention Formula A device for inputting information containing a counter, a first decoder, a switching unit, a multiplexer, a contact debouncing unit, a pulse generator, an And element, a register, and a second 5 decoder, the counter outputs being connected to the information inputs of the register, the multiplexer address inputs, and the first decoder inputs The outputs of which are connected to the horizontal busbars of the switching elements block, the vertical buses of which are connected to the information inputs of the multiplexer, whose code connects Not with the contact debounce block input, the register outputs are information outputs of the device, characterized in that, in order to increase the reliability of the input information, indicator blocks, key blocks, a group of registers and a group of shift registers are entered into it, while the register outputs are connected to the inputs of the second decoder and information inputs of the group registers, and the group of recording inputs of each i-ro group register (where i 1, ..., p, n is the number of input parameters) is connected to the corresponding inputs by the i-ro block The keys and outputs i-rc of the group shift register, clock inputs of the group shift registers are connected to the register setup input and the output of the bounce block, the installation input of the group shift register in i-ro is connected to the corresponding output of the second decoder, inputs of the First group i-ro a block of indicators connected to the outputs of the i-ro 0 five 0 5U25638 the group register, the inputs of the second group of the element I, the second input of which is connected so that the indicator block is connected to the output of the multiplexer, the outputs of 1to of the key block generator connected to the first input I Exit  about HER Editor C, Patrusheva Compiled by A, Alekseev Tehred MD Duc Proofreader L. Patay Zack 4769/45 Circulation 7S4 VNIIPY USSR State Committee on dyam inventions and discoveries 113035, Moscow, Zh-35, Rzushska nab. d. 4/5 counter input. ; j- / i I 12 p. g 7 k ;; - / L - / k / f Yu-p ii " ev I  f r Subscription