SU1422365A2 - Complement flip-flop - Google Patents

Description

(61) 528689 /

(21) 4196311 / 24-21

(22) 02.20.87

(46) 09/07/88. Bul No. 33

(72) A.S. Galkin and V, P. Fungus

(53) 631.3.055 (088.8)

(56) USSR Author's Certificate 328689, cl. H 03 K 3/286, 1976.

(54) TRIGGER WITH COUNTABLE INPUT

(57) The invention relates to a pulse technique and can be used in automation devices and computing devices with a large amount of interference and interference. The purpose of the invention is to increase reliability by eliminating completely prohibited states in the operation of a trigger. The trigger contains an installation trigger 1 and auxiliary triggers 2 and 3, consisting respectively of AND-HE elements 4 and 5.6 and 7.8 and 9, as well as two elements OR 10 and 11. To achieve this goal, the output of the second element OR 11 connected to the third input of the first element AND-4 of the first auxiliary trigger. 2 Il.

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The invention relates to the field of pulsed technology, can be used. Used in various devices; Tomatics and computing with a large number of interference and pickup, and is an improvement to the device auth.St. No. 528689.

The purpose of the invention is to increase the reliability of work due to the complete elimination of the prohibited states in: the functioning of the trigger.

FIG. 1 - trigger scheme; in fig. 2 diagrams of his work.

A trigger with a counting input contains an installation trigger 1 and auxiliary trigger 2 and 3, consisting respectively of AND-HE elements 4 and 5, 6 and 7, 8 and 9, as well as two elements OR 10 and 11, the first inputs of which are connected to the counting input 12 of the trigger, the second inputs - with the outputs of the element AND-NOT 6 auxiliary trigger 2 and the element AND-NOT 9 of the auxiliary trigger 3, respectively The outputs of the elements OR 10 and 11 are connected respectively to the inputs of the elements AND-NO 4 and 5 of the installation trigger 1. The output of the element AND-NOT 7 auxiliary trigger 2 is connected to the inputs ementov AND-4 and B, and the output member 8 of the auxiliary flip-flop 3 is connected to the inputs of AND-NO elements. 5 and 7. The second inputs of the elements AND-NOT 7,8 are connected to the counting input 12 of the trigger. The output element AND-NOT 4 installation trigger 1 is connected to the input element AND-NOT .6, the output element AND-NOT 5 - with the input element AND-NOT 9. The third input element AND-NOT 6 auxiliary trigger 2 is connected to the output of the element OR 11 .

The trigger works in the following way.

At the initial moment, before applying positive pulses to the input bus 12, the output level of the AND-HE element 4 of the installation trigger 1 has a high level, and the output of the AND-HE element 5 is low. A low level at the input bus 12 determines a high level at the outputs of the NAND elements 7 and 8. A low level at the output of the NAND element 5 determines a high level at the output of the NAND 9 element and the output of the element OR 11. At all inputs of the element AND-NO 6 has a high level, which determines a low level at its output, which in its

the queue provides a low level on the element code OR 10.

Consider the time t, the beginning of the first pulse on the input bus 12. In this case, a low level is formed at the output of the element AND-NOT B and a high level at the output of the element OR 10. A low level at the output of the element Q AND-NOT B leads to the formation of a high level at the output of the element AND-NOT 5 installation trigger 1, which in turn ensures the formation of a low signal at the output 5 of the element AND-NOT 4, i.e. The setup trigger is switched. A low level at the output of the NAND 4 element leads to the formation of a high level at the output of the NAND 6. Element. There are no other changes in Q signals at the outputs of the logic elements at the time t.

The instant tj of the termination of the first pulse on the input bus 12, at the output of the AND-NO element, forms a high level 5 signal. In this case, at both inputs of the element IS-HE 9 a high level appears, which leads to the formation of a low level at its output, and this in turn determines the formation of a low signal at the output of the element OR 11. Other changes of the signals at the outputs of the logic elements at time t j does not occur.

At the moment t of arrival, a second pulse on the input bus 12, a high level is formed at the output of the element OR 11 and a low level at the output of the element AND-HE 7, which leads to the formation of a high level at the output of the element AND-NOT 4. At the same time All inputs of the AND-NOT 5 i element turn out to be a high signal level, which determines the appearance of its low level code. In this way, the switching trigger 1 is switched. A low level at the output of the NAND 5 element leads to the formation of a high level at the output of the NAND 9. Element. There are no other changes in the signals at the outputs of the logic elements at time t.

At the time t4 of the end of the second pulse on the input bus 12, a high level 5 is formed at the output of the element NE 7, resulting in a low level at | the output of the element AND NOT 6, which, in turn, provides a formed low level

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- 1422365

the element OR 10. Other I-PE signals at the outputs of the logs left two

elements at time t does not occur. At the end of the second input pulse, all the logic elements of the trigger with a counting input are output signals that fully coincide with the signals before the first pulse is applied.

The proposed trigger is free from prohibited states. In the case of a low level at the output of the element OR 11, a high level is required on the codes of the elements.

Editor L. Zaitseva

Compiled by T, Besteme nova

Tehred M. Didyk Corrector. Cherni

Order 4439/55

Circulation 928

VNIIPI USSR State Committee

for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5

AND-PE

6 and OR 10, which excludes the appearance of a low signal level at the two inputs of the installation trigger 1.

Claims (1)

Invention Formula Trigger with a counting input on auth.St. No. 528689, characterized in that, with aim of raising II on by eliminating the forbidden states, the output of the second element OR is connected to the third input of the first AND element of the first auxiliary trigger. if tj t. 9ig.2 Subscription