SU1418809A1 - Dynamic memory regeneration device - Google Patents

Abstract

The device relates to computing technology and can be used in the design of semiconductor random access memory of a dynamic type. The aim of the invention is to increase the utilization of dynamic memory by reducing the loss of time for the regeneration of information. The device contains a block of operating memory for fixing calls (PFD), a block of permanent memory (ROM), the first and second multiplexers, the block of the prohibition, the counter of the regeneration address. In the device, the regeneration period T., П Pg is divided into 2 intervals, each of which is assigned its own number R (, .., 2 -1). At the time t of the external call at the address of line A, the binary number R of the current interval number is written to the PFD cell. During each interval, all PFD cells are polled, and the ROM analyzes the contents of the PFD cell (Vg) and the current interval number (Ar) to fulfill the condition Arg - Vg I and generates a regeneration request signal when it is executed. I il. cl

Description

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The device relates to supervisory technology and can be used in the design of semiconductor random access memory devices of a dynamic type.

The aim of the invention is to increase the utilization of dynamic memory by reducing the loss of time for the regeneration of information.

The drawing shows a diagram of a device for regenerating a dynamic memory.

The device contains the address inputs 1, the first multiplexer 2, the address outputs 3, the second multiplexer 4 block 5 of the RAM for recording PFD calls, block 6 of the permanent memory (ROM), block 7 of the ban, counter 8 of the regeneration address (CAP) , input 9, request external requests, inputs 10 clock pulses. The drawing also shows the outputs 11-14 ROM 6.

The device works as follows.

Input 1 receives the addresses of dynamic memory strings, which are accessed externally. An external access signal and clock pulses are received at the inputs 9 and 10 of the device. Counter 8 has a fill period. If it is assumed that the number of lines in the dynamic memory is 2, and the number of information bits in the PFD is 5 g, then the frequency of the clock, g.

pulses should be r, and

 i xp

counter 8 must have r + d bits. The lower d bits of the SAR 8 determine the address of the line in the dynamic memory (and the cell address in PFD 5) and are connected to multiplexer 4. The older g bits of counter 8 are connected to the information inputs of the PFD 5 and the inputs of the ROM 6. The outputs of the PFD 5 (g Dov) are connected to the corresponding inputs of ROM 6. Thus, PFD 5 contains 2 (by the number of lines of dynamic memory) g-bit cells.

. It is expedient to consider the device operation in two modes - in the absence of external calls and if available. We assume that in PFD 5, each address contains an rd word, which is determined by

We last accessed the corresponding line of the memory.

In the absence of external calls, the VFD 5 is in the interconnection mode, the Multiplexer D connects to the address inputs of the VFD 5 the corresponding outputs of the counter 8. Under the action of control pulses from the output 12. The ROM 6 changes the state of the counter 8, i.e. address of the word to be counted from PFD 5. Thus, in the code of PFD 5, g-bit words corresponding to these addresses appear successively. Output 11 of ROM 6 is activated (line regeneration request) when the condition

A, - B,

one

(one)

five

0

five

0

five

0

five

where A is the code on the g outputs of counter 8; and B is the code on the g-outputs of PFD 5, defining the current time (relative to the interval) and the time of the last access to this (determined by the current addresses of PFO 5) line, respectively. The condition (1) is checked on the falling edge of 10 clock pulses, and the control pulse at output 12 of the ROM 6 is generated and the state of the counter 8 changes on the rising edge of 10 clock pulses. The frequency of the clock pulses is such that their period of follow up is T T pg + S Y, where T pg is the time required to perform the regeneration of the memory line, and i y is the duration of the clock pulses. Since, in the absence of external calls, the contents of PFD 5 do not change the request for regeneration (output 11 of ROM 6) of any line of the dynamic storage device — with exactly through the period of filling in the counter 8 of the regeneration address -.

In the presence of external circulation signals, the device operates as follows. The request for external access 9 is synchronized with TI 10 on the corresponding fronts (the leading edge of BO 9 corresponds to the leading edge of TI 10, and the falling front - to the rear). The external access signal 9 generates control signals at the outputs 13 and 14 of the ROM 6. The multiplexer 4 connects the address bus 1 to the address inputs of the PFD 5, which is switched to the write mode. Thus, in PFD 5, a record is made of the current state of the senior G-bits.

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counter 8. It can be imagined that the time interval (the period of filling the counter 8) is divided into 2 subintervals, each of which is assigned an RJ R-1 number, where R 2. Then at the time t of the external address at address A. A binary number R, the number of the current subinterval, is written to the PFD cell 5. During each such subinterval, all PFD 5 memory cells are polled, and ROM 6 analyzes the contents of PFD cell 5 (B) and the current subinterval number (A) for condition (1) and generates a regeneration request signal (output 11 of ROM 6) when doing it.

If the request for regeneration is formed during the external access, the prohibition block 7 delays the next regeneration until its termination.

Claims (1)

Invention Formula A device for regenerating dynamic memory, which contains a block of random access memory, records the first multiplexer, the information inputs of the first group and the outputs of which are respectively the address inputs and outputs of the device, and the information inputs of the second group are connected to the low-order outputs of the regeneration address counter, a priority block, the input request of whose external access is the device's input of the same name, and the output is connected to the control input of the first 9 multiplexer, and is the output of the device regeneration request, notably due to the fact that The purpose of the index is to use calling dynamic memory due to reduce the time lost to regenerate information; a second multiplexer and a fixed memory unit are inserted into the device, the information inputs of the first and second groups of the second multiplexer are connected respectively to the address inputs of the device and to the low-order outputs of the regeneration address counter, the outputs of the higher bits of which are connected to the address inputs of the second group of the permanent memory unit and to the information inputs of the operational memory of the fixation of calls, the address inputs and outputs of which are connected respectively venno to the outputs of the second multiplexer and to the address input of the first group unit permanent memory, the first input sample is connected to the first output unit constant memory and to input regeneration request block priority, the second input block retrieval constant the memory is the input clock of the device, and the third input of the sample is connected to the input of the external access request of the device, the second, third and fourth outputs fixed memory blots are connected respectively, with the synchronous input of the regeneration address counter, the control input of the second multiplexer, and with the write input of the operational fixation memory block.