SU1378023A2 - Device for shaping pulse trains - Google Patents

Abstract

The invention can be used in devices for forming, issuing and processing information. The purpose of the invention is to expand the functionality of the device. The device contains a pulse generator 1, address blocks 2 and 3, memory blocks 4 and 5, counters 6 and 7 and trigger 8. Introduction of the elements OR 9 and 10, trigger 11, pulse key 12 with control signal memorization and the formation of new functional connections allows you to form a series of pulses with the number of pulses corresponding to the number of periods of the clock frequency of the generator 1 pulses, stacked in the duration of the pulse and pauses of the generated sequence. 4 il.

Description

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The invention relates to a pulse technique, can be used in devices for forming, issuing and processing information and is additional to the author. St. No. 1221716.

The aim of the invention is to expand the functionality by forming a series of pulses with the number of pulses corresponding to the number of periods of the generator clock frequency, laid down in the pulse duration and pause of the generated sequence.

FIG. 1 is a functional block diagram of the device for generating pulse sequences in FIG. 2 - time diagrams that show his work; in fig. 3 shows a pulse key with memorization of the control signal, FIG. 4 - timing diagrams explaining the operation of a pulse key with memorizing the control signal.

connected to the control inputs of the address blocks 2 and 3.

A device for forming pulse sequences works as follows.

In the initial state, generator 1 does not generate pulses, selection codes are set at the outputs of address blocks 2 and 3, first lines of blocks 4 and 5 are set, counter 6 is set to one, counter 7 is set to zero, triggers 8 and 11 are set to the zero state, on buses 14–16, there is a level O. On bus 13, a level O arrives, which corresponds to the formation mode of the first-type pulse sequence devices.

The i-th line of block 4 contains a double code of the number N; which is defined by

N; P; - one,

(one)

A device for generating pulse sequences contains a pulse generator 1, address blocks 2 and 3, memory blocks 4 and 5, counters 6 and 7, trigger 8, elements OR 9 and 10, trigger 11, pulse key 12 with control signal memorization , weekend tires 14-16.

The output of generator 1 is connected to the subtracting inputs of counters 6 and 7 and the information input of key 12. The transfer output of counter 6 is connected to the R- input of trigger 8, the clock input of address block 2, the enable input of block 5 and the counting input of counter 7, counter transfer output 7 is connected to the S-input of the trigger 8, the clock input of the address block 3, the resolution input of the block 4 and the counting input of the counter 6. The information outputs of the address blocks 2 and 3 are connected respectively to the address inputs of blocks 4 and 5, the outputs of which are connected respectively to the information the moves of counters 6 and 7. Information outputs of counters 6 and 7 are connected to the inputs of the elements OR 9 and 10, respectively, the outputs of which are connected respectively to the S-input and R-input of the trigger 11. The output of the trigger 11 is connected to the control input of the key 12, the first and second the outputs of which are connected to the tires 15 and 16. The output of the trigger 8 is connected to the bus 14. The bus 13

where P) is the number of periods of the clock frequency generated by the generator 1, laying down into the duration of the i-ro pulse of the generated sequence.

The (1 + 1) -th row of block 5 contains the binary code of the number M;, -, which is determined by the expression

(2)

M; +. ,

- s

5 0 s

0

five

where mj, is the number of clock periods. the frequencies laid down in the length of the pause between i-M and (i + 1) -M pulses. I

The number of lines in blocks 4 and 5 is determined by the required number of pulses of the generated sequence, and the number of bits is determined by the maximum pulse and pause durations, respectively.

The operation of the device is explained by the timing diagrams shown in FIG. 2, which show signals at the following points of the functional diagram: at the output of the generator 1 (a), at the output of the element OR 9 (b), at the output of the element OR 10 (c), at the output of the trigger 11 (d), at the output-transfer counter 7 (d), at the transfer output of the counter 6 (e), at the output of the trigger 8 and the bus 14 (f), at the first output of the key 12 and the bus 15 (h), at the second output of the key 12 and the bus 16 (and).

As soon as generator 1 begins to generate clock pulses, the first of them goes to the computational inputs of counters 6 and 7 and the information input of key 12. At the same time, the number recorded in counter 6 decreases by one, and negative output is generated at transfer output of counter 7 a pulse that sets the trigger 8 to state 1, as a result of which the front edge of the first pulse of the sequence is formed on the output bus 14. Since, under the action of the first pulse generated by the generator 1, the state of each information output of counter 7 changes from zero to one, the output of the OR 10 element and the R input of the trigger 11 also sets level 1, but the state of the trigger 11 it does not change, since at the control input of the key 12 at the moment of formation of the first impulse there was a level O, then this impulse from the information input of the key 12 passes to its first output. In this case, on bus 15, a first pulse of a series of pulses is generated, which is generated synchronously with the first pulse of the sequence being formed.

Suppose that in the pulse sequence that is required to be formed, the first three pulses must have durations that correspond to 7, 2 and 6 cycles of the clock frequency, respectively, and the pauses between the first and second, second and third, third and quarter pulses should be placed respectively 5, 4 and 3 periods of the clock frequency.

In accordance with (1) and (2), we determine that the first, second and third lines of block 4 should contain binary codes of numbers 6, 1 and 5, respectively, and the second, third and fourth lines of block 5 should contain numbers 4, 3

and 2 respectively.

The pulse generated at the transfer output of the counter 7 changes the state of the address block 3 via a clock input, as a result of which a code for selecting the second row of the block 5 is set at its outputs. The same pulse sets the binary code of the number 6 at the outputs of block 4 and - writes the specified code to counter 6

Jq j5 20 25 ep

35 40

five

0

five

at the entrance to The next six pulses of the clock frequency (from the second to the seventh) pass to the first output of the key 12 and bus 15, and also reduce the number recorded in the counter 6 to zero. In this case, the output element. OR 9 and the S-input of the trigger 11 is set to the level O, under which the trigger 11 is set to state 1. In spite of the fact that during the seventh clock pulse the signal changes from 0 to 1 at the control input of the key 12, this pulse is generated on bus 15 without distorting the duration. This is due to the property of the pulse key with the memory of the control signal (Fig. 4). The eighth clock pulse frequency goes to the subtracting inputs of counters 6 and 7 and passes to the second output of key 12 and bus 16, since the control input of key 12 has level 1. Under the action of the eighth pulse, a negative pulse is generated at the transfer output of counter 6 sets at the outputs of address block 2 the selection code of the second line of block 4, sets the code of number 4 at the outputs of block 5 and writes it to

7. In addition, the same impulse sets the state O trigger

8. As a result, the trailing edge of the first pulse of the sequence is formed on the bus 14, and the first pulse of a series of pulses generated synchronously is formed on the bus 16.

with a pause between the first and second pulses of the sequence.

The next four clock pulses (from the ninth to the twelfth) pass to the second output of the key 12 and the bus 16, and also reduce the number recorded in the counter 7 to zero. The element OR 10 decrypts the zero state of the counter 7 and forms the level O, under the action of which the output of the trigger 11 and the control input of the key 12 sets the level O. The twelfth pulse is formed completely on the bus 16. The thirteenth pulse from the output of the generator 1 passes on the first output of the key 12 and the bus 15, and also generates a negative pulse at the output of the transfer of the counter 7, which sets the selection code for the third row of the block 5 at the outputs of the address block 3, sets the code of the number 1 at the outputs of block 4 and writes a second counter 6. This pulse also sets the flip-flop state 1 8. As a result, the bus 14 is formed on the front edge of the second pulse sequence, and the bus 15 is formed by the first pulse train of pulses generated in synchronism with the second pulse sequence. Further operation of the device is similar to that described.

Thus, as a result of the operation of the device, an impulse sequence was formed on the output bus 14, the first three impulses of which have durations in which 7, 2 and 6 periods of the clock frequency of the generator 1 are laid respectively (Fig. 2 g). On the output bus 15, a series of pulses were formed synchronously with the pulses of a sequence, with the number of pulses in each

the series is equal to the number of clock periods that fit into the corresponding pulse of succession (in this case, the first three series have respectively 7, 2 and 6 pulses, frrig 2 h), a series of pulses formed on the output bus 16 synchronously with pauses of the sequence, moreover, the number of pulses in each series is equal to the number of periods of the clock frequency that fit into the corresponding pause (in this case, the first three series have respectively 5, 4 and 3 pulses, Fig. 2 and) Series of pulses formed during operation roystva on tires

FIG 2

0

five

five

0

five

15 and 16 can be used to synchronize the sequence formed on bus 14. In addition, the data of a series of pulses can be used to control the duration of their respective pulses or pauses of the sequence or as independent series of pulses that carry certain information.

When forming a sequence of another type (for example, a sequence in which the durations of the pulses and pauses are equal and do not depend on the codes stored in blocks 4 and 5), a single potential is applied to the bus 13.

Claims (1)

Invention Formula A device for the formation of .pulse sequences according to the author. St. N5 1221716, characterized by the fact that, in order to expand its functionality, a pulse key with a control signal is entered into it, a second trigger, the first and second OR elements, whose inputs are connected respectively to the information outputs of the first and second counters, the outputs are connected to S- and R-BXO- the second trigger, the output of which is connected to the control input of a pulse key with the storage of the control signal, whose information input is connected to the output of the pulse generator, and the first and second you ode connected respectively to the second and third output buses. C o co7} II G} / oo . J Fue.