SU1187246A1 - Device for generating pulse trains - Google Patents

Description

The invention relates to a pulse

technique and can be used

in particular, in devices for generating control commands.

The aim of the invention is to expand the functionality of the device by ensuring the formation of a series of pulses with a variable number of pulses in a series in a predetermined sequence ’θ.

The drawing shows a diagram of the proposed device.

A device for forming a series of pulses contains a master oscillator 15, 1, whose output is connected to the first inputs of flip-flops 2 and 3, the first output of flip-flop 3 is connected to the second input of flip-flop 2, the output of which is connected to counting input 20 of the scaling unit 4 5, the counting input of which is connected to the second output of the trigger 3, and the output is connected to the setup input of the counting unit 25 and the synchronization input of the shift register 6, the setup input of which is connected to the second input of the trigger 3; log register 6 is connected to the inputs of the zero encoder 7 zero and information inputs of the multiplexer 8, the control inputs of which are connected to the outputs of the counting unit 4, and the output is connected to the third input of the trigger 3, the output of the decoder 7 zero is connected to the zero information input of the multiplexer 8 and the input control register of the shift register 6, the setup input of the register 6 is connected ₄₀ with the bus 9 control signal, the output of the trigger 2 - with the output bus 10, the serial input of the shift register 6 - with the bus 11 zero signal, and his info Operational inputs - with 12 program management tires.

I

The device works as follows.

In the initial state generator 1 50

generates a sequence of pulses with a period of T _h , which is fed to the first inputs of flip-flops 2 and 3. At the initial moment of time (in the absence of a control signal on the 55 bus 9). the second output of the trigger 3 contains pulses, the conversion unit 5 operates in the counting mode and resets the conversion unit 4 after a time equal to Τ _ή = T _c -K ₂ , where K _g the conversion factor of the second conversion unit 5, fixing the pause duration between the pulse series. As a scaling block 4, a binary counter is used, the outputs of which are connected to the control inputs of the multiplexer 8, determining the switching of the corresponding output of the shift register 6 to the output of the multiplexer 8. The number of the information input of the multiplexer 8 corresponds to the binary code of the counter

4. At the output of the decoder 7 zero there is a signal with a logic level "1" (which corresponds to the recording mode of the shift register 6), at the output of multiplexer 8 there is a signal with a logic level "0". The trigger 2 is in a single state, and there are no pulses on the output bus 10. The arrival of the control signal on the bus 9 permits writing to the shift register 6 of a unitary code specified on buses 12 by a negative differential signal at the output of block 5. At the corresponding output of the shift register 6, a signal appears with a logic level of "1" at the output of the decoder 7 zero a signal with a logic level "0", which corresponds to the shift register shift register 6, the output of the multiplexer 8 - a signal with a logic level "1", which allows the transition to a single state of the trigger 3 in the pause between the pulses coming from the output of the generator 1. Thus, at the first output of the trigger 3 appears zero potential. This potential arrives at the second input of trigger 2, allowing it to switch to “0” from the first (after a pause) pulse coming from the output of generator 1. Thus, trigger 2 starts to pass the pulse sequence to the output bus 10, the counting input of the counting unit 4 and to the input of the installation "0" of the counting unit 5. The trigger 3 at this time is in a single state, and there are no pulses at the counting input of the counting unit 5. Upon receipt at the counting input of the counting unit 4 KD pulses at the output of the multiplexer 8 appears zero potential

3 1187246 4

arriving at the third input of the trigger 3, which goes into zero input and begins to pass a pulse sequence to the counting input of block 5. On admission to 5

the input of the counting unit 5 K ₂ pulses at its output (on the trailing edge of the input pulse) appears zero potential, which resets the counting unit 4 .. At the output of the multi-10 type-10, a single potential appears, and the trigger 2 starts to pass the pulse sequence to the output bus 10 , while preliminarily, by a negative transition of the signal at the output of block 5, a single potential is shifted in the shift register 6 by one bit. Further, the processes are repeated until a single 20 potential is pushed out of the shift register 6, i.e. the register will be set to zero

state. The process of writing to the shift register is similar.]

6 unitary code with bus 12, and gave> processes are repeated.

Thus, on the bus 10 of the device <1, periodic series of pulses are formed. Number of episodes "is limited by ^- formula

N - K + 1,

where N is the bit width of the shift re;

K is the number of the digit in which the single sweat] dial is written.

The number of pulses in the series; also the sequence of their following is determined by the order of connecting the outputs of the shift register 6 to:> swarm the multiplexer input group

8. The duration of the pause between a series of pulses is determined by the succession of T _c · K ₂ .

Claims (2)

A DEVICE FOR THE FORMATION OF A SERIES OF PULSES, containing a master oscillator, the output of which is connected to the first inputs of the first and second triggers, the second inputs of the first and second triggers are connected to the first output of the second trigger and the control signal bus, the first and second counting blocks, counting which inputs are connected respectively to the output of the first trigger and the second output of the second trigger, the installation input of the first conversion unit is connected to the output of the second conversion unit, the installation the input of which is connected to the output of the first trigger, distinguished by the fact that, in order to expand the * functionality, a shift register, a zero decoder and a multiplexer are entered into it, the third input of the second trigger is connected to the output of the multiplexer, the first group of inputs of which is connected to the outputs of the first recalculation unit, and the second group of inputs is connected to the outputs of the shift register and the inputs of the decoder whose zero output is connected to the zero input of the multiplexer and the control input of the shift register, the synchronization input The values of which are connected to the output of the second conversion unit, the setup input of the shift register is connected to the second input of the second trigger, and the information inputs are connected to the program control buses. - $ C „„ 1187246 one 1187246 2