SU1347112A1 - Device for controlling a.c.voltage regulator having increased frequency element - Google Patents

Abstract

The invention relates to shtomatiki and pulse technology and can oo 4 h T

Description

be used in phase regulators that provide forced output of the control object to a given parameter value without overrun. The aim of the invention is to expand the functionality of the device and improve ease of use. At the outputs of the counter 12, a code defining the phase shift of the control pulses, which determines the sequence of the connection of the multi-pend input, is constantly present. copy 9 to its output, when switching the first or last input bus arises. a correspondence of the signals at the inputs of the elements AND 10 or 11j signals from inputs of which the RS-flip-flop 13 is thrown, the signal at the inverse output of which determines pe1

The invention relates to automation and impulse technology and can be used mainly in autonomous control systems with increased requirements for noise immunity and with special requirements for the output of the system to the control mode. In particular, in phase regulators that provide the forced exit of the control object to the specified value of the parameter without overrun,

The purpose of the invention is to expand the functionality of the device and increase ease of operation.

The drawing shows a block diagram of the device for controlling the regulator

The device contains a generator of short pulses 1, a switch 2, a switch control block 3 and a pulse shaper 4 switch 2 contains a distributor 5 pulses whose outputs are connected to the signal inputs of multiplexer 6, and the information input is from the output of short pulse generator 1, the output of multiplexer 6 is connected to the input the pulse former 4, the switch control unit 3 contains a zero-body 7, the input of which is intended to be connected to the power supply network, and the output is connected to the counting information of the counter 12. Pr and the signal to the clocking control input of the counter 12 is clocked, "resulting in the control pulse phase remaining unchanged. If in the setter of the initial phase shift code 15 to dial the number and enter it over the parallel information input buses into the counter 12 when the enable signal at its input enables the parallel input of information, the device will fix the new dynamic phase state, i.e. It is possible to cause a coincidence of the signals at the inputs of the AND 10 and I elements and resume the phase scanning mode with the required initial change in the direction of change of the phase shift 1 slug.

the input of the pulse distributor. 8 and the reset input of the distributor 5 pulses, the outputs of the distributor 8 pulses are connected to the signal 5 inputs of the multiplexer 9, and the first and last outputs of the distributor 8 are also connected to the first inputs of the elements O O and 1-1, respectively, the output of the multiplexer 9 is connected to 10 second inputs And 10 and 11 elements and to the clocking input of the counter 12, the outputs of the And 10 and 11 elements are connected to the first S and R inputs of the RS flip-flop 13, respectively, the second S and R15

the inputs of which are the inputs of the initial installation of the counting direction of the counter 12, the direct output of the RS-flip-flop 13 is connected to the first S-input of the RS-flip-flop 14, and the inverse - to the second S-input of the RS-flip-flop 14 and the control input of the operating mode of the counter 12, The R input of the RS flip-flop 14 is the latch control input of the dynamic state of the device, the output

The RS flip-flop C is connected to the clock control input of the counter 12, the unit 15 of the initial phase shift code, the outputs of which are connected to the inputs of the parallel information input of the counter 12 made with the input of the parallel input of information, the outputs of the counter 12

connected to the control inputs of multiplexers 6 and 9.

The device works as follows.

At start-up, a strobe-pulse is fed to the input of the installation of the distributor of 8 pulses and thus ensures that the trigger distributor triggers to zero.

The trigger 14 as a result of acting on or the S inputs of the logical 1 trigger 13 is set to enable the logical level at the PE input of the counter 12 by sequential input of numerical information on the C input of the clock.

Let the application of a control pulse to the input S, or R trigger 13 be set to the state of the summation (vii) mode of the counter 12.

At the time of formation of the next strobe pulse at the output of the zero-organ 7, the trigger of the distributor 5 pulses are set to zero, and the pulses of the generator 1 short pulses provide a sequential switching of the logical 1 output of this distributor in a time sequence

Let zero be written in the counter 12 of the bottom. Then the first impulse of the generator 1, switching the first bus of the multiplexer 6, provides its connection to the output and logic 1 switches the input of the driver 4, ensuring the complete filling of the half period. The first gate-pulse of the zero-organ 7 causes the formation of a logical 1 and on the first output bus of the distributor 8 pulses, logical 1 switches the first input of the multiplexer 9. The control inputs of the multiplexer 9 are affected by the code of the number recorded in the counter

12, and these determine the connection of the first input of the multiplexer to the output, which causes the content of the counter 12 to increase by one. Trigger element And 10, caused by a match at its inputs ,. no effect

to change the state of flip-flop 13, since it is set on the Sj input of the same name on the previously accepted condition: a pulse of the control signal applied to the S input, which determined the status of the trigger

13, corresponding to the summing mode of the counter 12,

12

Re-increasing the content of the counter 12. per unit causes a connection to the output of the multiplexer 6 and 9 input buses with an increasing number. This causes the possibility of a subsequent increase in the content of the counter 12 by one each time the phase l changes if the half-period is filled in the direction of decreasing, and this happens with each subsequent strobe-pulse of zero crossing of the input voltage. When the latter is switched, for example, the I6th bus of the multi-splexers 6 and 9, the filling phase is reduced to a minimum, and a coincidence occurs at the inputs of the H 11 element, which ensures its operation and the trigger 13 that is triggered by this, which changes the operation mode of the counter 12 from the summation mode to subtraction mode. As a result, the direction of the phase change in the direction of increasing the filling is changed, and the contents of the counter 12 are successively reduced by one until the occurrence of | coincidence at the inputs of the element 10 and the trigger 13, which is triggered by this, to the initial state. The counter again changes the operation mode to summation, and there is a clock cycle: summation - subtraction. The device works with phase scanning.

If during the operation of the device in the scanning mode, a control strobe-pulse is applied to the B-input of the RS-flip-flop 14, then this causes the flip-flop 14 to switch to the I-input 7: the level of the trigger output at the PE input of the counter 12 is blocked by the C input, The device remembers the dynamic phase state from the moment of the generation of a solid pulse. Since changing the contents of counter 12 by sequential input of information (clocking) is prohibited, any change in the input bus connections of multiplexer 9 to its output and, consequently, the possibility of occurrence of matches on elements 10 and 11 with a change in the state of the trigger 13, t is excluded. e. remembering the phase state of the device is long-term. However, if in the setter 1.5 you dial the number and enter this number on the parallel information input buses

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when the permissive impulse is at the PV input of the counter 12, the device records a new dynamic phase state. In this way, it is possible to cause an artificial match at the inputs of the And 10 or 11 elements and resume the phase scan again with the required initial change in the direction of the phase states,

Dp of providing the required direction from the moment the device starts up, it is necessary to apply a control pulse to the corresponding inputs of the direction of the phase change and thereby preliminarily switch the trigger 13 into one or another state that determines the mode of summing or subtracting the meter 12, and there is a certain feature in operation of the device when applying to the P input of the trigger 13 of the controlled pulse with the formation of the subtraction mode of the counter 12, which determines the change in phase filling of the half period upwards. In this case, a number must be dialed in the setpoint 15 corresponding to the connections to the output input n, n-1, n-2 ,,, - of the multiplexer 9 bus (except for the first bus corresponding to the maximum, since the zero state of the counter 12 causes element triggering And 10 and undefined trigger state 13)

The considered modes of operation significantly expand the possibilities of using the device. For example, a phase scan mode may be used in a number of processes where it is required to provide an enhanced one. noise immunity, since the comparators used for these cases, the first input of which is supplied by a linearly varying voltage, and the second input, the feedback signal, are devices with a number of disadvantages.

The use of the pre-burned device reduces the hardware costs of the DPJs with the digital control system in comparison with the known ones.

Claims (1)

Invention Formula A DPN control device with a variable voltage regulator with a frequency link, containing a short pulse generator, Q g o 5 o g 0 g Q five 26 a mutator, a switch control unit and a pulse shaper, characterized in that, in order to extend the functionality and increase the convenience of operation, the switch is designed as a first pulse distributor and a first multiplexer, with the information input of the first pulse distributor connected to the output of a short pulse generator, the outputs of the first pulse distributor connected to the signal inputs of the first multiplexer, the output of which is connected to the input of the pulse shaper, the control unit The switch contains a null organ, a second pulse distributor, a second multiplexer, two AND elements, two RS triggers, a counter and an initial phase shift code setter, the input of the zero organ being connected to the power supply network, and the output connected to the reset input of the first pulse distributor and information input of the second pulse distributor, the outputs of which are connected to the signal inputs of the second multi-. The first and last outputs are also connected to the first inputs of the first and second And elements, respectively, the output of the second multiplexer is connected to the second inputs of And elements and to the clock clock input of the counter, the outputs of the first and second And elements are connected to the first S and R inputs of the first RS-flip-flop respectively, the second S- and K-inputs of which are the inputs of the initial installation of the counting counter direction, the direct output of the first RS-flip-flop is connected to the first S-input of the second RS-flip-flop, and the inverse to the second 8-input of the second BS -three the runner and to the control input of the meter operation mode, the R input of the second HB trigger is a control input for latching the dynamic state of the device, the output of the second RS trigger is connected to the clock control input of the counter, the output of the initial phase shift code setting output is connected to the parallel input of the information a counter made with a parallel input input, the outputs of the counter are connected to the control inputs of the first and second multiplexers.