SU1316076A1 - Jk-flip-flop - Google Patents

Abstract

The invention relates to a pulse technique and can be used to create digital LSIs. The purpose of the invention is to increase noise immunity and expand the scope. The device contains KZ-triggers 1 and 2 for injection transistors, transistors 7,8,9 and 10,11, respectively, of the first and second types of conductivity. To achieve this goal, transistors 12-15 of the second conductivity type are introduced into the device. 1 hp f-ly, 2 ill. 2S (L with O5 о о «Ф

Description

113

The invention relates to a pulse technique, namely, devices with two stable states on logic elements with injection power, and can be used to create digital LSIs.

The aim of the invention is to increase the noise immunity and the expansion of the scope of application of the 1K-trigger.

FIG. 1 shows a circuit diagram of a 1K trigger; in fig. 2 - sketch of the topology of the 1K-trigger in the integrated design on the elements of injection logic powered by the substrate.

The 1K flip-flop contains RS-flip-flops 1 and 2 on the first through fourth injection transistors 3-6 of the first conductivity type, from the fifth through the seventh injection transistors 7-9 of the first conductivity type from the first to the sixth transistors 10-15 of the second conductivity type The bases of transistors 10-15 are connected to common bus 16, the bases of transistors 3 and 4 are connected respectively to the first and second collectors of transistor 7, to collectors of transistors 12-15, the base of transistor 7 is connected to synchronization bus 17, the second collectors 18 and 19 of transistors 3 and 4 are connected s, respectively, with the bases of the transistors 5 and 6, with the emitters of the transistors 10 and 11, the second collectors 20 and 21 of the transistors 5 and 6 are connected respectively with the output buses 22 (Q) and 23 (Q), the first collectors 24 and 25 of the transistors 10 and 11 are connected respectively to the emitters of transistors 12 and 13, to the collectors of transistors 8 and 9, additional collectors 26 and 27 of transistors 10 and 11 are connected respectively to the bases of transistors 8 and 9, to emitters of transistors 14 and 15, and input buses 28 ( 1) and 29 (K).

1K-trigger works as follows.

When 1 1 transistor 7 is open, transistors 3 and 4 are closed. The second RS trigger 2 stores previously recorded information in it. At the moment of arrival of the negative edge of the synchronization pulse, the transistor 7 is closed, transistors 3 and 4 begin to open. Depending on the ratio of the charge currents of the bases of the transistors 3 and 4, one of these transistors is first switched on and the other closed.

At 1 K O transistors 8 and 9, 14 and 15 are closed. Esl and transistor 5

15

0

five

ABOUT

35 40

open before the arrival of the negative clock edge, the base current of transistor 4 is greater than the base current of transistor 3 due to the additional current flowing through the open transistors 10 and 12. Therefore, first the transistor 4 turns on, the transistor 3 is closed. The information recorded in the second RS flip-flop 2 is stored, i.e. 1K-trigger stores information.

When I K 1, an additional feedback circuit is switched on through transistors 10 and 11.14 and 15.

An important condition for the operation of the 1K-flip-flop is a higher current transfer coefficient in the feedback loop through the transistors 10 and 11.14 and 15, compared with the current transfer ratio in the feedback loop through the transistors 10 and 11, 12 and 13

t

-14

4s

24 ° 24 tZ 2i ° z5 13

where s

24

27.

  2-1

12

collector area 24-27 transistors 10 and 11;

transmission coefficients for the respective collectors of transistors 10 and 11;

current transfer coefficients of transistors 12–15.

The specified condition can be met by various technological methods, for example, using different geometry at the bases of transistors 12-14,10 and 11, using collectors 24 and 26.25 and 27 transistors 10 and 11 with different area.

Then, when I K 1, the first transistor of the first pair is turned on first, the collector of which is connected to the base of the switched on transistor of the second pair. If, for example, transistor 5 is turned on, transistor 3 is turned on first, transistors 4 and 5 are turned off. The information recorded in the second RS-flip-flop 2 is reversed.

When, the first turns on the transistor 3 and sets the second RS-flip-flop 2 to the state, respectively, 1, Q 0.

O, K 1 first turn on 4 and set second

This is Q when I transistor

RS flip-flop 2 to the corresponding state, 1.

31

After one of the transistors of the first RS flip-flop 1 turns on any changes in the information on buses 28 and 29 do not lead to a change in the states of the first and second RS-flip-flops.

Thus, the proposed device performs the functions of a 1K trigger, clocked on the negative edge of the synchronization signal,

The proposed 1K-trigger has a greater noise immunity and a greater range of application, since it perceives information only at the moment of the arrival of a negative clock edge, which allows it to build on its basis single-touch peers.

Claims (1)

Claim 20 1. 1K-flip-flop containing two RS-flip-flops on two pairs of injection transistors of the first conductivity type with collector-base connections, 25 with the bases of the first and second Injection transistors of the first RS-flip-flop connected to the first and second collectors of the fifth pin-hole transistor , the base of which is 30 tori of the second RS flip-flop and the corresponding one is connected to the synchronization bus, the second collectors of the first and second injection transistors of the first RS-flip-flop are connected respectively to the bases of the third and fourth injection - on the second transistors of the second RS-flip-flop and emitters of the first and second transistors of the second conductivity type, the bases of which are connected to the common bus, the second collectors of the third and 40 fourth injection transistors of the second RS-flip-flop are connected to the direct and inverse output buses, respectively, input bus I and K are actually emitters of the first and second transistors of the second conductivity type, their first collectors and, respectively, emitters of the third and fourth transistors of the second conductivity type, their second collectors and correspondingly etstvenno emitters of said fifth and sixth transistors of the second conductivity type, the base of the sixth and seventh transistors of injection of the first conductivity type, the base of the first and second injection transistors of the first RS-flip-flop and respectively collectors of the fifth and sixth transistors, fourth and Dineny, respectively, with the bases of the pole 45 of the third transistors of the second type of the first and seventh injection transis-conductivities are made in the form of the first-type conductors, the number regions of the semiconductor. The lecturers of which are connected, respectively, with the first collectors of the first and second transistors of the second conductivity type, characterized in that, in order to increase the noise immunity and expand the field of application, the third, fourth, fifth and sixth transistors of the second conductivity type, the bases of which are connected to the common bus, collectors of the sixth and seventh injection transistors of the first conductivity type are connected respectively to the emitters of the third and fourth transistors of the second conductivity type, the collectors of which are respectively connected to the bases of the first and second injection transistors of the first RS-flip-flop and the collectors of the sixth and fifth transistors of the second conductivity type whose emitters are connected respectively to the output lines I and K and additional collectors of the first and second transistors of the second conductivity type, 2. 1K-trIGgger according to claim 1, characterized in that, in the case of an integral implementation of the base of the third and fourth injection transistors of the second RS-flip-flop and corresponding The emitters of the first and second transistors of the second conductivity type, their first collectors and the emitters of the third and fourth transistors of the second conductivity type, their second collectors and the emitters of the fifth and sixth transistors of the second conductivity type, the base of the sixth and seventh injection transistors of the first conductivity type, the first and second injection transistors of the first RS flip-flop and, respectively, collectors of the fifth and sixth transistors, the fourth and