SU1312751A1 - Device for synchronizing pulse sequence - Google Patents

Abstract

The invention relates to electrical engineering. The purpose of the invention is to improve the noise immunity. The device contains a switch I, el-And 2 and 3, el-OR 4 and 5, shaper (F) 6 pulse sequence, F 7 short pulses, r-r 8 clock pulses, counters 9 and 10, triggers 11 -14, f 15 and 16 control pulses and decoders 17-22. Increasing the device noise immunity in synchronization mode is achieved by opening the device input only at the moment of the arrival of a series pulse. In the synchronized mode, the goal is achieved by reducing the duration of the open state of the input from a time slightly exceeding the interval between pulses in a series to a time slightly exceeding the duration of a pulse in a series. 1 il. (L 8m1o9 you ate

Description

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The invention relates to electrical engineering and can be used in pulsed technology, digital automation systems, information transmission systems, as well as to synchronize the operation of receiving indicators of radio navigation systems for signals from ground stations.

The purpose of the invention is to improve the noise immunity.

The drawing shows a structural electrical circuit of the device.

The device for synchronizing a pulse sequence contains a switch 1, the first and second elements of AND 2 and 3, the first and second elements of OR 4 and 5, the driver 6 of the pulse sequence, the driver 7 short pulses, the generator 8 clock pulses, the first counter 9, the second counter 10, the first , second, third, fourth triggers 11-14, first and second drivers 15 and 16 control pulses, first, second, third, fourth, fifth and sixth decoders 17-22.

The device synchronization pulse sequence works as follows.

The input of the generator 6 receives an input sequence of pulses consisting of a series of four pulses with a duration of 0.1 s, following a time t of 2.5 seconds with a follow-up period of t 20 seconds, which at the output of the former 6 in amplitude is suitable for further processing.

At the moment of turning on the device is-. It goes into synchronization mode (search for the first pulse of the series), in the second period of the series it determines the first pulse of the sequence and, starting from the third period, the output of the device is a series of pulses without interference and synchronized to the input series of a sequence of pulses, confirming that the device synchronized .

In the event of the first impulse of the series disappearing at the device input (due to the effect of interference) after synchronization under the input sequence of a series of pulses, the device automatically prohibits the application of a series of impulses to the output and switches to the synchronous mode

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impulses.

Consider the operation of the device in more detail.

After turning on the power, when any pulse arrives at the device input, it returns to the initial state of the synchronization mode. At the same time, a positive pulse from the output of the imaging unit 6 is supplied to the first inputs of the first and second elements I 2 and 3, and also to the R input of the fourth trigger 14. The single and zero potential, respectively, from the direct and inverse outputs of the second trigger 12 goes to the second inputs, respectively the first and second elements And 2 and 3, respectively, permitting and prohibiting pro-. walking to their pulse outputs from the output of the imager 6. Therefore, a positive pulse from the output of the first element AND 2 through the first element OR 4 enters the R input of the first trigger 11 and converts it to the zero state. In this case, at the time of changing the state of the first trigger 11, a short pulse from the output of the imaging unit 7 goes to the R inputs of the first and second counters 9 and 10, setting them to the zero state.

From the generator output 8 pulses.

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frequencies f -o-1kHz come 2 11

to the clock input of the first counter 9 with a capacity of N 2-tj-f 20x20x1000 - 40,000, causing a change in its state.

From the output of the first counter 9, a parallel eight-bit code of eight higher bits is fed to the outputs of the first and second drivers 15 and 16 of control pulses, the first, second, third, fourth, fifth and sixth decoders 17-22.

Suppose that after the power was turned on, the fourth pulse of the series was the first to enter the synchronization device input. Then, from the output of the second shaper 15 control pulses, a positive pulse with a duration T of 0.25 s arrives at the S input of the fourth tripra 14 and does not change its state.

After a time t of 12.25 s, the output potential of the third decoder 19 to the second input of the switch I and p vigorously decoder 21 receives a single potential that prohibits the operation of the fifth decoder 21 and permits the passage of pulses from the inputs of the switch 1 to its output. From the output of the second counter 10, a two-bit parallel code of its zero state is fed to the CO input of switch 1, allowing the pulse to pass only from the second input to the output of switch 1 A positive pulse from the output of switch 1 through the second element OR 5 goes to the S inputs of the first, second and third triggers 11-13. In this case, along the positive pulse front, the first trigger 11 goes to the single state, and the second and third triggers 12 and 13 retain the single state.

Thus, immediately before it arrives at the device input at 12.5 from the first pulse of the series, it enters the initial state.

Suppose that after the power is turned on, the third pulse of the series first arrives at the input of the synchronization device, under which the device operates in the same way as described above. After a time, 5 s from the output of the second generator 15, a positive impulse of 0.25 sec is received at the S input of the fourth trigger 14, the fourth input of the series with a duration of 0 arrives at the R input, 1 C switches fourth trigger 14 to the zero state. In this case, the negative voltage drop from the output of the fourth trigger 14 is supplied to the T input of the second counter 10 and changes its state by one. At the end of the positive impulse received at the p-input of the fourth trigger 14, this trigger under the action of zero potential goes into one state.

The two-digit code of the unit state of the second counter 10 is fed to the CO input of switch I, allowing its output to pass only from the first input of switch I. Therefore, after 14.75 seconds from the output of the sixth decoder 22 through switch 1 and the second element OR 5 to the B-inputs of the first, second and third triggers 11-13 enters

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a positive impulse, on the positive front of which the first trigger 11 goes to the single state, the second and third triggers 12 and 13 retain their single state. Consequently, in this case, just before the device enters the input for 15 seconds from the first pulse of the series, it passes to the initial state.

In this case, the negative voltage drop from the output of the fourth flip-flop 14 enters the T-input of the second count 10 and changes its state by one. Upon termination of the positive impulse arriving at the S input of the fourth trigger 14, this trigger, under the action of a zero potential, goes into a single state.

The two-digit code of the secondary state of the second counter 10 is fed to the CO input of the switch I, prohibiting the passage of its pulses from the first and second outputs to the output. Therefore, after a time t of 17.25 seconds from the output | Yes of the fourth decoder 20, a positive im- comes to the S-inputs of the first, second, and third triggers 11-13 through the second element OR 5. the pulse, on the positive front of which the first trigger 11 goes to the single state, and the second and third triggers 12 and 13 retain their single state. Consequently, in this case, just before the device enters the input at 17.5 seconds from the first pulse of the series, it returns to the initial state.

Thus, in any case, the device automatically, starting from the second period, finds the first impulse of the series.

Consider the operation of the device when the first pulse arrives at the input of its first pulse after switching on.

After the arrival of the first, second and third impulses of the series, the device will work exactly as in the previous case. The fourth impulse of the series. At the moment of time t 7.5 s from the output of the imaging unit 6 is fed to the R input of the fourth trigger 14, without changing its single state, it also goes to the first inputs of the first and second element I 2 and 3. the second element And 3 is closed, and the first element And 2 open signals from the outputs of the second trigger 12.

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Therefore, from the output of the first element P1 2 a positive impulse through the first element OR 4 will go to the R-input of the first trigger II, confirming its zero state. In the same way as in the previous case, at time 17.25 on the positive front of the pulse received from the output of the fourth decoder 20, through the second element OR 5 to the B-INPUTS of the first second and third triggers, the first trigger 11 goes to one state the After a time t of 17.75 s, a positive impulse from the output of the first decoder 17 arrives at the R input of the second trigger 12 and converts it to the zero state, thus the zero and single signals from the forward and inverse outputs of the second trigger 12, respectively. And 2, closing it, and the third input of the second element And 3. Therefore, the interference pulses arriving at the input of the device from the time t 17.75 from the time t 19.75 s, do not arrive at the output of the first and second elements And and not leads to races uu device. Starting from the moment of time t 19.75 s to t 20.25 s, a single potential arrives from the output of the second shaper 16 control pulses to the second input of the second element I 3.

Therefore, the first impulse of the series, which arrived at the input of the device during t 20 s, goes to the R input of the fourth trigger 14, does not change its state, and to the first inputs of the closed first element 2 and the open second element 3.

From the output of the second element I 3, a positive pulse arrives at the R input of the third trigger 13, transferring it to the zero state, and also through the first element OR 4 to the iR input of the first trigger 13, setting it to the zero state.

At the moment of the transition of the first trigger 11 to the zero state, the shaper 7 generates a short pulse, which is supplied to the R inputs of the first and second counters 9 and 10, setting them to the zero state

The zero potential from the output of the third trigger 13 enters the DE-in switch 1, prohibiting the passage

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its output signals from any input of the switch 1, also goes to the DE input of the 5th decoder 21, allowing the supply of signals, free from interference, output to the device output that is synchronized under the input sequence.

After synchronization, the device operates in the subsequent periods in the same way as described in the previous case, except that the first, second and third triggers 11-13 at time t 17.25 s under the action of the positive edge of the pulse arriving at the S-inputs through the second element OR 5, from the output of the fourth decoder 20, goes to one state even if, due to the effect of interference, the second, third and fourth pulses of the series do not arrive at the device input at the same time.

Consider the operation of the device after synchronization in case of the first impulse of the series disappearing due to the effect of interference.

If during the time 75 seconds to 25 seconds of the open state of the second element I 3, no impulse arrives at the input of the device, the first and third triggers 11 and 13 retain their single state. At time t 20.5 from the output of the second decoder 18, a positive pulse through the second element OR 5 is fed to the S inputs of the first, second and third triggers, transferring the second trigger 12 to the one state and confirming the single state of the second and first triggers 12 and 11. Consequently, the device automatically returns to the initial state of synchronization mode.

The increase in the noise immunity of the proposed device in comparison with the known in the synchronization mode is achieved by opening the device input only at the moment of arrival of a series pulse.

In the synchronized mode, the noise immunity of the device is increased by reducing the duration of the open state from a time slightly exceeding the interval between pulses in a series to a time slightly exceeding the duration of a pulse in a series.

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Claims (1)

Invention Formula A pulse sequence synchronization device containing the first and second elements AND, an input pulse sequence driver, the output of which is connected to the first inputs of the first and second elements AND, the output of which is connected respectively to the first and second inputs of the first OR element, the output of which is connected to the R input of the first trigger, the output of which is connected to the input of the first counter through the shaper of the short pulses, the clock input of which is connected to the output of the clock generator, and the output of the first the first counter is connected to the inputs of the first, second, third, fourth, and fifth decoders, while the first and second outputs of the second trigger are connected to the second inputs of the first and second elements, respectively, and the R and S axes of the second trigger are connected respectively to the output of the first decoder and to the output of the second element OR, the first and second inputs of which are connected to the outputs of the second and fourth decoders, the output of the second element I is connected to the R input of the third trigger, the S input of which is the editor E.Papp Compiled by N. Lebed nska Tehred L.Oleynik Proofreader A.T. Order 1980/55 Circulation 639Subscription VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Production and printing company, Uzhgorod, Projecto st., A 15 27518 yen with S-inputs of the first and second triggers, as well as the fourth trigger, with the input of the driver. the input pulse sequence 5 and the output of the fifth decoder are, respectively, the input and output of the device, characterized in that, in order to increase the noise immunity, a switch, a second counter, a sixth decoder, the first and second control drivers are inserted, while the first counter input is connected with the input of the second counter, the clock input of which is connected to the output of the fourth trigger. The K and S inputs of which are connected respectively to the output of the driver of the input pulse sequence and the output of the first driver of control signals, the input of which is connected to the output of the first counter and the input of the second driver of the control signals whose output is connected to the third input of the second element I, the outputs of the third trigger, the second counter, the third and sixth decoders are connected to the corresponding inputs of the switch, the output of which is connected to the second input of the second element OR, the output of the third The trigger is connected to the second input of the 5th decoder. 0 five 0