SU1547049A1 - Pulse synchronizing device - Google Patents

Abstract

The invention relates to a pulse technique and can be used in automation, in the equipment for receiving and transmitting discrete information. The aim of the invention is to improve the reliability of synchronization. The pulse synchronization device contains shapers 1 and 2 pulses, coincidence element 3, triggers 4 and 6, phase handler 5, input bus 8, bus 9 clock pulses. The device allows to reduce the number of resynchronizations from the front to the cut of the clock pulse, which increases the reliability of synchronization. 2 Il.

Description

The invention relates to a 1-pulse technique and can be used in automation, in apparatus for receiving and transmitting discrete information.

The chain of invention is to increase the reliability of synchronization.

Figure 1 shows the electrical structural diagram of the proposed device; in Fig.2 - time diagrams explaining the operation of the device.

The device contains the first 1 and. second 2 pulse shapers, the outputs of which are connected respectively to the first and second inputs of the coincidence element 3, the output of which is connected to the counting input of the first trigger 4, the output of which is connected to the first input of the phase manipulator $ ·; the output of which is connected to the clock input of the second trigger 6, the information input of which is connected to the input of the first pulse generator 1 and to the input bus 7, and the output - to the input bus 8, the second input of the phase manipulator 5 is connected to the bus 9 of the clock pulses. The first pulse shaper 1 generates at its output short pulses along the front and slice of the input pulses. This second pulse shaper 2 generates pulses along the front of the input pulses. As a phase manipulator 5, an EXCLUSIVE OR element can be used.

The device operates as follows.

The bus 9 receives clock pulses with a duty cycle equal to two (figure 2). If when the power source is turned on, trigger 4 is set to a position at which its output will be at a high level, then through the manipulator 5 the clock signal passes without phase inversion (time interval 0-10, in Fig. 26), and the input bus goes 7 'signal, which in the General Case is not synchronized with the clock signal (Fig.2, c).

The signal from the output of the manipulator 5 is fed to the former 2, at the output of which short high-level pulses are formed along the edge of the clock signal (time intervals 1-2, 5-6, etc. in Figs. 2d). The signal from the bus 7 is fed to the information input of the trigger 6 and to the input of the driver 1, at the output of which short pulses of a high level are formed along the front and the cut of the input signal (time intervals 3-4, 7-8, etc., in Fig. 2 , e).

If the pulses from the output of the shaper 2 do not fall into the zone of crushing (unstable presence) of the output signal, then the pulses from the output of the shaper 1 do not coincide in time with the pulses from the output of the shaper 2, as a result of which a high level is maintained at the output of the coincidence element 3 (time interval 0- 1 0 in FIG. 2, f), and the indicated state of the device is stable, since trigger 4 does not change its state. The signal from bus 7 to bus 8 passes with a delay determined by the basic shift between the clock signal and. input signal.

Since with the specified source. In the state the front edge of the clock signal from the output of the manipulator 5 is outside the crushing zone of the input signal, then a signal is generated at the output of the trigger 6 (on bus 8) (time intervals 5–9 in FIG. 2, and) without distortion and synchronous with the clock signal. In this mode of operation of the pulse synchronization device, the delay of the output signal relative to the signal arriving at bus 7 reaches a maximum value equal to the difference between the period of the clock signal and the pulse duration from the output of the driver 2 only in the case of a delay in the edges of the input signal relative to the edge of the clock signal for an interval equal to pulse duration from the output of the shaper .2 (not shown).

If the front of the clock pulses arriving at the clock input of the trigger 6 coincides with the edges of the input signal arriving at the bus 7 due to the crushing or reduction of the phase shift of the input signal relative to the clock and pulses, i.e. the pulses from the outputs of the shapers 2 and 1 overlap in time (. the time interval 10-11 in Fig. 2, b - 2, e), then a low-level pulse is formed at the output of the coincidence element 3. (. the time interval 10-11 in figure 2, e), the trigger edge of which switches the trigger (time 11 in figure 2, g) ..

With the indicated initial state, i.e. after the trigger switch 4, its output is set low level signal, thereby to ^{May 1547} 049 ~ outlet 5 formed manipulator 'clock' inverted signal coming onto the bus 9 (interval 11-15 in Figure 2, b). At the moment of switching of the manipulator 5 at the output 'of the former 2, an additional pulse is not formed, since at this moment a slice of the pulse is formed at the input of the manipulator 5 (time moment 1 1 in Fig. 2, b).

Since a clock signal with a duty cycle equal to two is supplied to bus 9, then after switching the manipulator 5, the leading edge of the clock pulses arriving at the clock input of trigger 6 coincides with the middle of the input pulses arriving at the information input of this trigger, if their duration is equal to or close to to the duration of the period of the clock spools (time point 12 in Fig. 2, b, c, d), i.e. with an area not subject to crushing.

If at the moment of coincidence of the edge of the clock pulse and the edge of the input signal does not overwrite. of the input signal to trigger 6, then this dubbing is performed by the first yutpulse from the output of the manipulator 5 after switching it (point in time 12 in Fig. 2, and).

In this case, the output signal to the pulse synchronization device is reproduced without failures on the bus 7 (Fig. 2, from time 12), and the first pulse is fully reproduced with a delay of half the period of the clock pulses in relation to the input signal ( figure 2, the time interval 12-13).

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When reducing the phase shift of the input signal relative to the clock signal, the pulse duration from the output of the driver 2, the time interval 10-11 in figure 2, d determines the forbidden zone of convergence of the Fronts of the input signal and the clock signal, respectively, coming to the information and clock inputs of the trigger 6. Output delay relative to the input in this case reaches a maximum value and is equal to the difference between the period of the clock signal and the pulse duration from the output of the driver 2 (the dotted line in figure 2, in and the interval al time 13-14 in Fig. 2, and).

With a further decrease in the phase shift, the moment of coincidence of the pulses from the outputs of the shapers 1 and 2 comes again, as a result of which trigger 4 switches, which in turn leads to the switching of the phase of the clock signal at the clock input of trigger 6 from inverse to direct (not shown )θ). With further decreases in phase shift, the operation of the device is similar to that described above.

If during the operation of the pulse synchronization device there is a 15 increase in the phase shift between the clock signal and the input signal, then in this case there comes a time when the pulses from the outputs of the shapers 2 and 1 overlap (time interval 20 or 15-16 in figure 2, b - Figure 2, d). At the same time, a low-level spool is formed at the output of the coincidence element 3 (time interval 15-16 in FIG. 2, f), with a cut of which 25 trigger 4 is switched again (time point 16 in FIG. 2, g). At the output of trigger 4, with the indicated initial state, a high level signal is set, and the clock signal passes without inversion to the output of the manipulator 5 from this moment 30 (time point 16 in Fig. 2, b). At the moment of switching the manipulator 5 at the output of the former 2, no additional pulse is formed after and earlier, since at the moment of switching at the output of the manipulator 5 a pulse cut is formed (time moment 16 in FIG. 2, b).

When the manipulator 5, 40 is switched, after which a clock signal passes to its output without inversion, clock pulses again arrive at the clock input of trigger 6, the front of which coincides with the middle of the input d5 pulses (time point 16 in Fig. 2, b, c), those. with the zone of the most reliable operation of the pulse synchronization device, and the signal received on the bus 7 from that moment on is generated without failures and with a delay of half the clock cycle period (time point 17 in Fig. 2, and).

Claims (1)

Claim A pulse synchronization device comprising a phase manipulator, the first input of which is connected to the output of the first trigger, the counting input of which is connected to the output of the coincidence element, the first input of which, through the first pulse shaper, is connected to the information input of the second trigger, the output of which is connected to the output bus, clock input Via the second pulse shaper with the second input of the coincidence element, the BUS of INPUT pulses and the bus of 10 output pulses, characterized in that, in order to increase the reliability of the sync of ronization, the input pulse bus is connected to the information input of the second trigger, the clock input of which is connected to the output of the phase manipulator, the second input of which is connected to the clock pulse bus. pp! π π! π π p I I -II ______________ = n 151617