SU1304040A1 - Function generator - Google Patents

Abstract

The invention relates to analog and analog-to-digital hybrid computing and can be applied in the simulation of automatic control systems. The purpose of the invention is to improve accuracy. The functional converter contains analog-to-digital converter 1, twelve digital-to-analog converters 2-13, two decoders 14 and 15, nine registers of 16 24 memory, six groups of 25-30 keys and an output adder 31. Reproduction of a given function is based on the implementation of a through piecewise quadratic approximation with a uniform partition of the function definition domain. 2 Il. (O (L 00 o 4 O 4 ::

Description

The invention relates to analog and analog-to-digital hybrid computing and can be applied in the simulation of automatic control systems.

The purpose of the invention is to improve accuracy.

FIG. 1 shows a structural diagram of a functional converter; in fig. 2 is an example of a through piecewise quadratic approximation.

The functional converter contains analog-to-digital converter 1 (ADC), twelve digital-to-analog converters (DAC) 2-13, two decoders 14 and 15, nine registers 16-24 memory, six groups of 25-30 keys, output adder 31, The digital input 32 of the task set in FIG. 2 as a curve, (x).

In a functional converter, this curve is approximated on all

5 plot xx. A through approximation is carried out by a segment of a parabola, the equation of which has the form f ((. The value of the coefficient K2 is chosen on the basis that

10 Ё point, 5x. The amplitude of the error curve (x) and the approximating parabola) coincide.

The nature of the methodological error resulting from the end-to-end approximation of a given function at the same time as the linear section of the h and the parabola 4, j (x) is shown in FIG. 2 curves H (x) and H (x), for which it is true

- - - 5 - - yyy - .- W t-, 1, .yy1l, 1N. McG Vvv 5 - - Max A. Z.ZHDYI

function and informational effects of 20 sections of curves 4 (x) and (x)

The converter input 33 is represented by a segment corresponding to a functional parabola converter. (x) i), and works as follows. For these segments, the corresponding coefficients K and K are selected according to the reproduction of a given function.

based on the implementation of a through Ku-provision of the equality if (x) 4) (x)

Juicy-KPYAPYAUTCHYY YPPPKPIMYATTII GGPICH ((f

juicy-quadratic approximation for a uniform partition of the domain of definition of a function.

The given function F (x) is represented by a linear segment connecting 30 the origin and F (x) (Fig. 2). It is conditionally accepted that

and 4 (x) v (x).

By the curves H (x), 4 (x), h (x) and 4 (x), for which the relations ifM2,5) Vg (2,5) are valid; H (5) (5); (7.5) 4, (7.5); ; (0} 0} on each of the sections of the H (x), H (x), M (x), and 4 g (x) curves, the function is F (X) 0. For playback, it is played by the segment of the corresponding which F (x) provides a parabola, and for these segments the D / A converter 9 and memory register 23 are rendered, which select the corresponding coefficients K, K, K-, ,, Kg, in the adjustment mode A code corresponding to the value F (x) j may be written.

representation of a function by a linear cut-g- .. - .--. -. ,,, h /. „„ Com, K, - X, where K is a coefficient, 40 cases of changes from O to 10, the piecewise-corresponding tangent of the slope-quadratic approximation realizes on a linear segment, leads to the appearance of a methodical error,

Ch. K, x (x-chi) with the area of definition

1-- --- - С С, 75 Q3, CU1

equalities (x} (x}, H (x)

(x),; (x) h, (x),; (k) u}.

For c / 1, the function is given in pres by parabolas, the equations of which are

h

II

 x (x-xi;) K5 x (x-Xi :)

K x (x-xi), x (xx). x (xx) to

Parabolic coefficients are determined by the following relationships:

   5-F (x) 5-0.5

k - F (x) - j: .x)) J0.25-2.5

F (x), (x) -4 t (x) 0.25-2.5

h ll

t ii

Oix42.5; 2.5ix65:

,five; 7,

K,

at at, 5; at, 5;

shown in FIG. 2 as a curve, (x).

In a functional converter, this curve is approximated on all

plot xx. A through approximation is carried out by a segment of a parabola, the equation of which has the form f ((. The value of the coefficient K2 is chosen on the basis that

Its point, 5x. The amplitude of the error curve (x) and the approximating parabola) coincide.

The nature of the methodological error resulting from the end-to-end approximation of a given function at the same time as the linear section of the h and the parabola 4, j (x) is shown in FIG. 2 curves H (x) and H (x), for which it is true

provide equality if (x) 4) (x)

h ((f

and 4 (x) v (x).

By the curves H (x), 4 (x), h (x) and 4 (x), for which the relations ifM2,5) Vg (2,5) are valid; H (5) (5); (7.5) 4, (7.5); ; (0} 0} on each of the sections of the H (x), H (x), M (x) and 4 g (x) curves, the function is represented by a segment of the corresponding parabolas, and the corresponding coefficients K are selected for these segments, K, K- ,, Kg, providing

put the segment of the corresponding parabolas, and for these segments the corresponding coefficients K, K, K- ,, ,, Kg are selected, providing

 -h- ..--. -. ,,, h /. „„ Cases of changes from O to 10, the piecewise quadratic approximation realizes

1-- --- - С С, 75 Q3, CU1

equalities (x} (x}, H (x)

(x),; (x) h, (x),; (k) u}.

For c / 1, the task of setting a function in pre-g- .. -. -. ,,, h /. „„ Cases of changes from O to 10, the piecewise quadratic approximation realizes

with parabolas whose equations are

Oix42.5; 2.5ix65:

,five; 7,

at at, 5; at, 5;

1304040

F (x) - tfXx) - Ug (x) -d (x)

0.625 0.125 Flx) -, (x) -Ch, (x) -Ch e (x)

0.625 0.125

F (X) - fi (X) -) -Y.u (x) 0.625 0.125

F (x) -4, (x) - ci (x) -CH (x)

0,625-0,125

where F (x) is the approximating function jg of the developer, is a super- (the choice of the reduced values of the argument position of these eight functions. This follows from Fig. 2).

Approximating curve, we will consider at each segment of the size at the output of the functional prevalence separately:

F, (x) 4, (x) + H ,, (x) +% (x) + H 5 (x) ,, 5;

F,; (x) 4, (x) + (x) + c (x) + 4, (x), 2,

Fj (x) 4, (x) + 45 (x) + tf (x) + 4 Jx) ,, 5;

F; {x) if, (x) + 4 2 (x) + V (x) + 4 g (x), 7 ,,

a at the output of the functional converter we get

F (x) -F; (x) + F; (x) + F3 (x) + F; (x) or in expanded form

F (x), (x) +, J (x) (x)). + (X) (x) + Vj (x) + (x).

From the given relations (1) - (4, the principle of a through piecewise quadratic approximation follows.

The hardware implementation of relations (1) and (4) is shown in FIG. 1. A functional converter contains eight channels, each of which implements one of eight defined functional dependencies.

During the preparation of the functional converter for operation, the coefficients of the functions are calculated, which, in the form of a binary code, are sequentially written into registers 16-23, for which they are fed to the digital input 32 of the converter. If the function registers are written in a 16-bit parallel code, the upper 10 bits carry information about the magnitude of the coefficient, the lower four bits determine the register number and go to the decoder 14, which provides the generation of an enable signal to write to the selected register. Successively in nine cycles of reference to the functional converter, eight coefficients are written and the value of the function in registers 16-23.

The input analog signal of the converter is fed to the input of the ADC 1 and at the same time the analog inputs of the mind at, 75; at, 25; at, 75.

five

Knives 10-13. At the output of the ADC 1, we obtain a unitary code. When using, for example, a seven-bit ADC, the five least significant bits are fed to the digital inputs of multiplying DAC 11, and the functions H (x) and h (x) are implemented at the outputs of multiplying DAC 2 and 3. In this case, at the output of the multiplying DAC 11, we obtain the value (xx.) At and, which is a necessary condition for the formation of the functions C (X) and If (X). All seven bits from the output of ADC 1 are fed to multiplying DACs 12 and 13. At the output of DAC 12, we obtain ratios (xx-) 10 at. Compliance with this condition is necessary for the implementation of the functions Chd (x),), H, (x) and 4 g (x). From the output of the ADC 1, the unitary code also enters the input of the decoder 15, which ensures the generation of control signals for the keys of the groups 25-30.

The function X, X is implemented at the output of the multiplying DAC 10, the digital inputs of which are supplied with a binary code corresponding to the value K (from the register 24).

Functions (xx.) Are implemented as follows.

From the output of the ADC 1, the unitary code goes to the multiplying DAC 13. The analog input of the latter receives a signal from the input of the function converter; as a result, the output is x (xx,) 0 when and x (xx, -) 10 at. Next, from the output of the multiplying DAC 33, the signal is fed to the input of the multiplying DAC 8, the digital inputs of the latter from the output of the register 22 receive the code K. The result of multiplication is the output of K -X {XY: .-). I The channels for implementing the functions h (x) and (x) are identical, but therefore we will consider the implementation of one; nanopolymer ip (x), l; The channel consists of a register 6, in which the value of the coefficient Kj is written, the group of 25 keys and the y: multiply IDP 2. From the multiplying CPD 11, the analog input of multiplying 1 ЩЧ 2 receives the ratio х (х-Х;), to the digital inputs of the multiplying GAL 2 through the ground 25 of the keys comes the digital value K. The keys of group 25 are open when the argument changes, which corresponds to the area of the function definition (x). The function V (x) (xx -) is implemented in the channel: register I, key group 26, multiplying DAC 3 and 11, control input of key group 26 20 keys connected to the second output of the decoder 15. Function f (x} is implemented in the channel : register 18, in which the coefficient K is written, a group of 27 keys, the control input of which is connected to the corresponding output of the decoder 15, multiplying the DSP 4, whose digital inputs receive the value of the coefficient K, and the analog input is equal to x ( xx ;.) 30 in the interval About x 2.5. At the analog output of the multiplying CPD 4, we obtain the value of the function H , (x) K g x (xx, .-) as, 5. Functions Mj5 (x) implements --- c in the channel: register 19, in which j the coefficient K is written, a group of 28 keys, the control input of which connected to the corresponding output of the decoder 15, multiplying the DAC 5, the digital inputs of which receive the 40 value of the K coefficient, the analog input is a value equal to x () in the interval 2 ,. At the analog output of the multiplying 1DAP 5, we obtain the value of the function H (x) K x (xx ) The function f (x) is implemented in the channel: register 20, in which the coefficient is written, a group of 29 keys, the control input of which is connected to the corresponding output of the decoder 15, a 50-cutter or 6, the digital inputs of which receive the value of the coefficient K , to analog input - a value equal to x (xx.) in the interval, 5. At the analog output of the multiplying DAC 5, we obtain the values of the function H ,, (x) (xx x. The function -fs (-) is implemented in the channel: register 27, in which the coefficient 4 is written), the Kg patient, the circle {1304040. 6

PA of 30 keys, the control input of which is connected to the corresponding output of the decoder 15, multiplying the DAC 6, to the digital inputs of which is fed

coefficient value, on an analog input, a value equal to x (xx.) in the range of 7.5 eXy10. At the analog output of the multiplying GAL 5, we obtain the value of the function H „(x) K J, x (xx).

The registers used in the converter structure can be implemented, for example, on К 55ИР13 chips. The information inputs of the microcircuits are connected to the digital input of the converter. It is assumed that the used multiplying DACs contain an output operational amplifier. In the case of multiplying, its DAC without its own amplifier is necessary in the scheme to assign the connection of the output of each multiplying AAC with the subsequent element through an operational amplifier.

Claims (1)

Invention Formula A functional converter containing an output adder, the output of which is the output of a functional converter, nine multiplying digital-to-analog converters 5 connected by outputs to the inputs of an output adder, from the first to the ninth memory registers, the information inputs of which are connected to the digital input of setting the coefficients of the function converter function, characterized in that, with increasing accuracy, the tenth, eleventh, and twelfth multiplying digital-analog converters are introduced into it and, six groups of keys, two decoders and an analog-to-digital converter, the output of which is the information input of the converter, the output of the higher bits of the analog-digital converter is connected to the input of the first decoder whose outputs are connected to the control inputs of the corresponding key groups, outputs of memory registers Types one through six through the keys of the corresponding group are connected to the digital inputs of the respective multiplying digital-to-analog converters, the outputs of the seventh, eighth and ninth registers are pa ti are connected directly to respective inputs of the multiplying digital tsifznachenie factor, an analog input value of x (x-x. ) in the range of 7.5 YOX10. At the analog output of the multiplying GAL 5, we obtain the value of the function H „(x) K J, x (xx). The registers used in the converter structure can be implemented, for example, on К 55ИР13 chips. The information inputs of the microcircuits are connected to the digital input of the converter. It is assumed that the used multiplying DACs contain an output operational amplifier. In the case of multiplying, its DAC without its own amplifier is necessary in the scheme to assign the connection of the output of each multiplying AAC with the subsequent element through an operational amplifier. Invention Formula A functional converter containing an output adder, the output of which is the output of a functional converter, nine multiplying digital-to-analog converters 5 connected by outputs to the inputs of an output adder, from the first to the ninth memory registers, the information inputs of which are connected to the digital input of setting the coefficients of the function converter function, characterized in that, with increasing accuracy, the tenth, eleventh, and twelfth multiplying digital-analog converters are introduced into it , six groups of keys, two decoders and an analog-to-digital converter, the output of which is the information input of the converter, the output of the higher bits of the analog-digital converter is connected to the input of the first decoder; the outputs of which are connected to the control inputs of the corresponding groups of keys, the outputs of memory registers from the first to the sixth through the keys of the corresponding group are connected to the digital inputs of the corresponding multiplying digital-to-analog converters, the outputs of the seventh, eighth and ninth registers of the memory They are connected directly to the digital inputs of the respective multiplying digital-to-analog converters, the analog input of the seventh multiplying digital-to-analog converter is connected to the reference voltage bus, the analog input of the eighth multiplying digital-to-analog converter is connected to the output of the twelfth multiplying digital-analog converter connected by analog input to the analogs of the analogs that are connected to the unipopers, which are connected to the same way, they can be connected to the same way, they can be connected to the analogs, which are connected to the analogs, which are connected to the analogs, which are connected to the same way, they can be connected to the same circuitry, they will be connected to the same, they will be connected to the analogue, they will be connected to the analogs, they will be connected, they will be connected to the analogue inputs, which will be connected to the analogue inputs that will be connected to the digital inputs. eleventh multiplying digital-analog converters and information input m functional converter, digital input twelfth multiplying digital to analog converter coupled to the output of analog-to-digital converter, which outputs low bits rows connected to the digital inputs of the tenth and eleventh multiplying digital-to-analog converters; analog inputs of the first and second multiplying digital-to-analog converters connected to the output of the tenth multiplying digital-to-analog converter; analog inputs from the third to sixth multiplying digital-to-analog converters connected to the output of the eleventh multiplying digital-analogue converter; records of each of the memory registers is connected to the corresponding output of the second decoder, in od which is connected to a digital input specifying coefficients of the functional converter. Editor E. Kopcha Tehred c. Kadar Order 1313/50 Circulation 673 Subscription VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Rauschska nab. D. 4/5 Production and printing company, Uzhgorod, st. Project, 4 Corrector with. Cherni