SU1288697A1 - Device for controlling in response to time intervals - Google Patents

Abstract

The invention relates to the field of computing and can be used in control systems. The aim of the invention is to expand the functionality. The device contains a control unit, a register, a register of the time interval number, an adder, two groups of flip-flops, an input register, a group of registers of the code of the time interval, a counter, a group of comparison circuits, a group of elements And, and a pulse generator. The control unit contains a decoder, a NOT element and a delay element. The goal is achieved by implementing parallel processing of time intervals. 2 Il. YO 00 SH) C55 with

Description

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The invention relates to automation and computing technology and may be used in control systems where it is necessary to work several intervals of time.

The purpose of the invention is to expand the functional capabilities of the device due to the parallel testing of intersecting time intervals.

Figure 1 shows the functional diagram of the device; Fig. 2 is a functional block diagram of the control unit.

The device contains a control block 1, a register 2 of the time interval number, an adder 3, a group of 4 flip-flops, an input register 5, a group of 6 registers of the time interval code, a counter 7, a group of 8 comparison circuits, a group of 9 elements And, a generator of 10 pulses, a group of 11 triggers , the input 12 of the initial installation of the device, the outputs 13 of the indication of the completion of the device’s time interval,, 5 inputs 14 numbers of the time interval, 15 write synchronization, 16 duration of the device’s time interval.

The control unit (Fig. 2) contains a decoder 17, a HE element 18 and an EL element 1 HE 18 and a delay element 19.

The device works as follows. one

The generator 10 pulses form-, with clock pulses ,, counted

counting 7; in case of overflow, the counter 7 is reset to 0, and the pulse count continues from zero. At an arbitrary time, not dependent on the current state of counter 7, the binary position code of the recordable time number is fed to the device input 14, the Record signal is input to the input 15, and the binary time code of the interval duration in units is fed to the input 16 of the input register 5 time equal to the period of the formation of clock pulses by the generator 10. The Recording signal enables the operation of the decoder 17, is converted by the element HE 18 to the synchronization signal of the recording of the unitary (one-position) code of the time inter ala output from the decoder 17 to the register 2 and the slot number of the interval length in the input code register 5, and is converted in a delay element 19 sig

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Cash register reset 2 time interval numbers.

During the time between the entry into register 2 of the unitary code of a number and its reset by the adder 3, modulo 2 -1 is performed, where m is the width of the counter 7 and registers 5 and 6, the code of the time interval from the output of register 5 and the current value of the counter 7 , and the signal from the i-ro output of the register 2 translates into a single state the i-ro trigger of group 4 of the flip-flops, where i is the number of the time interval to be recorded (1 iiin, n is the number of time intervals). On the reset signal of register 2, coming from the output of delay element 19, to the i-M output of register 2, it generates a signal level difference that gates recording the result of the summation in the adder in the i-th register 6.

Recording information about other time intervals occurs in a similar way.

The end of the processing of time intervals is fixed by the comparison circuits 8, which form at the output a signal if the current state is equal. counter 7 code stored in the corresponding time and clock registers. The signals generated by the B-circuits are sent to the corresponding elements of AND 9. If the interval, for which the comparison circuit 8 has generated a signal, work off-, i.e. In the corresponding trigger of the first group of 4 triggers is stored 1, then at the output of the corresponding element And 9 a signal is generated that translates the corresponding trigger of group 11 of flip-flops and the corresponding trigger of group of 4 triggers into one state.

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Thus, the presence of units in the corresponding output bits 13 indicates that the corresponding time intervals have been worked out. After reading this information word, through the input 12 of the device, all the triggers of group 11 are transferred to the zero state and information about time intervals that they do not work out at this moment can be written to the device.

Claims (1)

Invention Formula A device for testing time intervals containing a control unit, a time interval number register, a group of time interval code registers, a counter, a pulse generator, the output of the pulse generator is connected to the counter input of the counter, the device’s time interval number input is connected to the information input of the control unit, the clock input of which is connected to the synchronization input of the device, which is due to the fact that, in order to expand the functional capabilities due to parallel testing, I cross there are two groups of triggers, an adder, an input register, a group of comparison circuits and a group of elements AND, the input of setting the device time interval duration is connected to the information input of the adder, the output of which is connected to the information input of the k-ro register of the time interval code the group, the output of which is connected to the first input of the k-th comparison circuit of the group, the output of which is connected to the first input of the k-ro element AND of the group (, n, where n is the number of generated time intervals), the output of which connect To the input of the installation in О k-ro trigger of the first group and to the input of the installation in 1 k-ro trigger of the second 5 o 0 0 five .group, the output of which is connected to the output of the k-ro bit of the indication of the completion of a predetermined time interval of the device, the output of the counter is connected to the second input of the adder and to the second inputs of the group comparison circuits, the first control output of the control unit is connected to the synchronous inputs of the input register and the temporary number register interval, the installation input to О and the output of the k-ro bit of which are connected respectively to the second control output of the control unit and to the input of the installation to the 1 k-ro trigger of the first group, the output of which is connected to the second the k-ro move of the group AND item, the output of the k-ro bit of the register of the time interval number is connected to the synchronous input of the k-ro register of the time interval code of the group, the information output of the control unit is connected to the information input of the register of the time interval number, the initial setup input of the device is connected to the inputs setting the second group of triggers; the control unit contains a decoder, a delay element and a NOT element, and the information input of the block through the decoder is connected to the information output of the block, clocked in od unit is connected to the strobe input de-, coder, through the NOT element - a first control output of unit, via a delay element - to a second output of a control unit. LM .. @. J / J Editor V. Petrash Compiled by M. Silin Tehred V. Kadar Order 7809/47 Circulation 694 Subscription VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab, 4/5  " Production polygraph: fiche. enterprise, Uzhgorod, st. Project, 4  2 Proofreader V. Booth ha