SU1256166A1 - Electronic regulator - Google Patents

Abstract

The invention relates to a pulse technique and can be used for tuning electronic equipment and in the process of regulation. The purpose of the invention is to improve the convenience of tuning and performance adjustment operations. The device contains a reversible counter of 1 pulses, a control unit 2, a resistive matrix 5 and an amplifier 6. Introduction of at least one bus 9 of the initial state installation and block 8 of the initial installation including inverters AND 12 and OR-NOT 13 and 14 elements and differentiating circuit 15, provides a programmable preset device I ZP f-ly, 1 ill. G 1C 01 Od Od

Description

The invention relates to a pulse technique and can be used for tuning electronic equipment and in the process of its regulation.

The purpose of the invention is to increase the convenience of tuning and the performance of adjustment operations by means of a programmable preset of the controller.

The drawing shows a structural diagram of an electronic controller.

The device contains a reversible pulse counter 1, the summation and subtraction inputs of which are connected respectively to the first and second outputs of control unit 2, the first AND second inputs of which are connected respectively to the first 3 and second 4 input buses, the code inputs to the corresponding inputs of the resistive matrix 5 and with the outputs of the reverse counter 1 pulse. The output of the resistive matrix 5 through the amplifier 6 is connected to the output bus 7. The outputs of the initial setup unit 8 are connected to the corresponding installation inputs of the pulse counter 1, the first input of the initial setup unit 8 is connected to the initial state setting 9, the second input is connected to the power bus 10 .

Block 8 initial udstrovki contains two inverters 11 and 12, two elements OR NOT 13 and 14 and a differentiating circuit 15, the first input of block 8 initial installation connected to the input of the first inverter 11 and the first input of the first element OR NOT 13, the second input which is connected to the first input of the second element OR-NOT 14, the second input of which is connected to the output of the first inverter 11, and to the output of the second inverter 12, whose input through the differentiating circuit 15 is connected to the second input of the initial installation block 8, the corresponding outputs of which us with the input of the second inverter 12 and with the outputs of the first 13 and second 14 OR-NO elements.

Instead of a reversible counter of pulses with separate installation inputs of the triggers, reversible pulse counters can be used with a preset on the synchronization input. In this case, the input synchronization reversing 0

The leg of the pulse counter is connected to the output of the differentiating circuit 15, and the pin 9 is directly connected to one of the information inputs of the reversible pulse counter.

The electronic controller operates as follows (the option of installing a five-bit pulse counter, i.e., a five-bit electronic controller, is considered in the position of 0.25 or 0.75 of the maximum level of the output voltage).

Let bus 9 be connected to bus 10 with an external switch - 5 bodies. When power is supplied to bus 10 by means of circuit 15, a single positive pulse is formed at the input of inverter 12, which, as it passes through inverter 12, enters the inputs of elements 13 and 14, and the level of logical unit arrives at the other input of element 13 from bus 9 , and the input element 14 through the inverter 11 - the level of logical zero. Thus, at the input of element 13, the combination 01 is implemented, which corresponds to the level of logical zero at its output, which is fed to the reset input of the trigger n - 0 of that bit of counter 1. At the input of element 14 during the passage of pulse from the output of circuit 15 00, and a positive pulse appears at its output, 5 which is fed to the trigger start input of the fifth size of counter 1. Simultaneously from the circuit 15 output, a positive pulse is fed to the reset inputs of the first, second 0 and third bits of the trigger and launch the fourth trigger of counter 1; moreover, for this variant of installation of counter 1, the opposite inputs of the triggers are connected to a common 5 bus. Thus, during the passage of a pulse, the triggers of the first, second, third bits are set to O, and the fourth and fifth bits are set to 1. The output state of counter 1 (00011) is converted using a matrix 5 to a voltage on the bus 7, equal to 0.75 of the maximum.

If bus 9 is connected to a common bus 55, then the state of counter 1 will be 00010, which corresponds to an output voltage equal to 0.25 of the maximum.

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In both cases, the installation after the end of the transient process, the output of the circuit 15 is maintained at a logic zero level, which, entering through the inverter 12 to the inputs of the elements 13 and 14 as a logical unit, leads to the formation at their outputs of a logic zero level, which is not affects the operation of the counter 1.

Further control of the device is reduced to the flow through the external level switches of the logical unit to the first (or second) input of block 2, which leads to the appearance of pulses at the input of the summation (or subtraction) of the counter 1, and therefore and to the corresponding change in bus voltage 7.

The achievement of the maximum and minimum values by the code at the output of the counter 1 is fixed by the corresponding elements of the block 2, while the passage of the pulses from the block 2 to the corresponding input of the counter 1 is stopped. This eliminates the possibility of an abrupt change (from maximum to minimum and vice versa) of the output voltage of the device.

Claims (2)

1. An electronic controller containing a reversible pulse counter, j, the summation and subtraction inputs of which are connected respectively to the first and second outputs of the control unit, the first and second inputs of which Compiled by A. Sokolov Redktor V. Petrash Dehred I. Khodanich Proofreader I. Muska ------- - - -. Order 4834/55 Circulation 816 Subscription VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Production and printing company, Uzhgorod, st. Project, 4 s About 5 0 5 1664 connected to the first and second input buses, code outputs to the corresponding inputs of the resistive matrix, the output of which is connected via an amplifier to the output bus, and to the outputs of a pulse counter, which, in order to increase the convenience of tuning and performance of adjustment operations account of the programmable controller preset; a block of initial settings and at least one bus of the initial state, which is connected to the first input of the block of initial settings, are entered into it; second input of which is connected to the power bus, the outputs - to the corresponding installation reversible pulse counter inputs. 2. The regulator according to claim 1, which is based on the fact that the initial settings block contains two inverters, two OR-NOT elements and a differentiating circuit, the input of the first inverter is connected to the first input of the first OR-NOT element, the second input which is connected to the first input of the second IPI-NE element, the second input of which is connected to the output of the first inverter, and to the output of the second inverter, the input of which through the differentiating circuit is connected to the second input of the initial settings unit, the input of the second inverter and the outputs of the first and second elements of RSHI- P E is connected to the corresponding outputs of the setup unit.