SU1251260A1 - Device for controlling rectifier converter - Google Patents

Abstract

The invention relates to electrical engineering and can be used to automatically control a valve converter. The purpose of the invention is to improve the accuracy and expand the range of control angle adjustment. The device contains a sync pulse shaping unit 1, a phase-shifting unit 3, which includes a memory register 7 and a master oscillator 4, a pulse distributor 8 with a counter (L o w o5 o {/ g J

Description

9, reversible counter 28, block 19 comparison of codes, as well as, additionally entered keys. 2, 24, 25, 27, selectors 14 and 23 of the number of pulses, RS flip-flops 15, 26, counters 17, 18, element 12, driver 21 short pulses, two elements OR 11, 22 and the input register 29. The control angle from 0 to 2P depends on the control code N, depending on which device operation is divided into m discrete intervals. The choice of the interval of operation is determined by the higher bits of the number N in register 7. Within the control angle from 0 to TG / 3, the unlocking angle of the corresponding thyristor. depends on the state of the low register bits 7. In this case, the start of the corresponding Invention relates to electrical engineering and can be used for automatic control of valve converters.

The purpose of the invention is to improve the accuracy and expand the range of control angle adjustment.

Fig, 1 shows a functional diagram of the device; FIG. 2 shows diagrams explaining his work.

The device comprises a sync pulse shaping unit 1 connected by inputs to a phase network. The first ;

its output is connected to the key 2 and to the phases by the shifting unit 3.

The phase shifting unit 3 consists of a master oscillator 4 connected by an output to the counting input of the counter 5, the input of which is set to zero is connected to the first output of block 1, and the outputs of the counter 5 are connected to the first inputs of the adder 6, the second inputs of which are connected to the outputs of the memory register 7 .

The pulse distributor 8 consists of a counter 9i modulo m (in the case under consideration, t 6), the outputs of which are connected to the decoder 10 connected to the outputs of the block 11 of the elements OR, and

The current thyristors are carried out by control pulses with a duration of 2IT / 3 through the element I 12, if there is a corresponding signal 13 at its inputs. When the control angle is equal to P / S + 4TT / t, the subsequent thyristors will be switched with the help of a pulse coming through the switch 2 to the counter 18. This pulse is formed under the condition that the counter codes 17, 18 are equal and the codes of counter 5 and register 7 are equal. The rate of change of the control signal is specified by register 29. The introduction of additional elements provides the specified mode of operation, which allows There is no need to improve the accuracy of adjustment at any rate of change of the control signal. 2 Il.

The first output of the decoder 10 is connected to the first and twelfth inputs of block 11, the second output of the decoder to the second and third inputs of the block -P, the third output to the fourth and fifth inputs, etc., the outputs of block II are connected through the block of 12 elements And with the inputs of the amplifiers that form the control signals, thyristors (not shown in Fig. 1). The other inputs of the elements of the block 12 are given a signal 13 enabling the thyristors to turn on.

The first selector 14 of the number of pulses is connected to the output of the master oscillator 4, and the control inputs to the corresponding outputs of the register 7 of the phase-shifting unit 3. The output of the first selector 14 is connected

with the R input of the first RS flip-flop 15 and with one of the inputs of the first element 16 OR, the second input of which is connected to the output of key 2. The control input of key 2 is connected to the output of the first RS flip-flop 15, and the input is connected to the output of block 1 and the input of the first counter 17 modulo t. The output of the element 16 is connected to the input of the second counter 18 modulo-n. Outputs

counters 17 and 18 are connected to the corresponding inputs of the block -19 of the code comparison, the output of which is connected to one of the inputs of element 20 I, the second input of which is co-. dinene with the output of the adder 6 of the phase-shifting unit 3. The output of element 20 and is connected to the input of a short pulse generator 21, the output of which is connected to the S-input of the trigger 15 and one of the inputs of the second element 22 OR, the other input of which is connected to the output of the second village : stop 23 of the number of pulses, the selector input is connected to one of the outputs of counter 5, and the control inputs to the corresponding outputs of register 7. The outputs of element 22 OR are connected to the inputs of the second key 24 and the third key 25, the control inputs of which are connected respectively to the inverter Nome forward and outputs the second R-flop 26, and the outputs of these switches are respectively connected with a countable and ustanovochny-. The inputs of the counter 9. R-input, trigger 26 is connected to the first output of block 11 of the distributor 8, and S-input is connected to the output of the fourth key 27, the input is connected to the second output of block 1, and the control input to the overflow output of the reversible counter 28, the summing input of which is connected to the output of the first selector 14, and the subtractive input to the output of the second selector 23. The inputs of the register 7 of the phase-shifting unit 3 are connected to the outputs of the input register 29. Information about setting the control angle can be entered into the register 29 from a computer or with toggle switch of setpoint. The input of the census register 7 is connected to the output of the master oscillator 4.

The device works as follows.

The control angle d, which depends on the control direc- tion N, can vary from 0 to 2 P. Depending on N, the operation of the circuit is divided into arithmetic intervals.

The choice of the interval of operation is determined by the higher bits of the number N, which is located in register 7. In block 1, narrow clock pulses are developed at the moments of switching of the valves, i.e. ZIT / m (diagram 1.1 figure 2), in this case, 60 °, and the synchronization pulse of one of the phases, for example, phase A (diagram 1.2, figure 2).

Consider the operation of the device within the d of O to 60. The sync pulse resets the counter 5 to the zero state and increases by 1 the contents of the counters 17 and 18 (diag. 5, 17, 18 figure 2). In this case, the angle from the corresponding thyristor will depend on the state of the lower bits of the register 7. As soon as the number

0 at the output of counter 5 is compared with the number written in these bits of register 7 (dia, 7), at the output of adder 6, the voltage drop (dia 6), and since the output

5 of block 19 there is 1 (fig. 19), then at the output of element 20, a signal turns on (Vick 20), the leading edge of which includes shaper 2I producing a short pulse that goes to one of the inputs of OR 22. From the output of this element, an impulse (diag., 22) through keys 24 (diag.24) or 25 (diag, 25), depending on the state of the trigger

26 (diag. 26), passes to the counter 9 From the output of the counter 9, the pulses go to the decoder 10, the outputs of which are connected to the inputs of the block 11: OR elements. From the output of this block, pulses with a duration of 120 in a steady state come through the elements of block 12 to trigger the corresponding thyristors in the presence of signals 13 (diag. 13, 12А, 12С, 12В, 12А, 12С; 12В).

0

five

0

five

0

five

When the control angle changes from oLj to otJ + 4TT / m, the corresponding selector receives the first selector 14, allowing 2 pulses from the master oscillator 4 to pass through element 16 OR to counter 18 and change the number at the output of this counter, the trigger 15 is reset, the output signal of which locks the first key 2. After that, the output of block 19 shows a potential (diag. 19) until the number at the output of counter 17 is comparable to the number of counter 18, with the result that the counter 9 distributor 8 will remain in the same position and (fig. 9) and will wait until the codes at the outputs of the counter. 17, 18 and the codes at the outputs of the counter 5 and the register 7 match. In addition, the pulses from the output of the selector 14 are fed to the summing input of the reversing counter 28 and is remembered in it. The output signal from this counter overwrites the rJ control range. , increase regulation with any manager

F o

rmula from

5 1251260 breaks the fourth key 27 JH trigger 26 cannot be set to state 1. Thus, the impulses to the input of counter 9 can pass only through the second key 24. As soon as the codes on the output of the register 29. counters 17, 18 coincide then, on the output of the block 19, the Wits enable signal for the pulse from the output of the adder 6, which occurs at the time of equality of the codes from the output of the counter 5 and the register 7, through the element 20 to the driver 21. The pulse from the output of the former 21 sets the trigger 15 state 1, as a result will be allowed pulses passing through the first switch 2 to the input of counter 18. Thus posledzlyuschie thyristors are switched to the TG / fT control angle.

ten

15

20

A device for a continuous converter; a block of forming a blue; the first output of which by its input is a phase shift containing a register generator; a distribution with a counter; a block compared to the target to accurately control the range of control; it has keys, two pulse selectors, two RS-three counters , by the element of short impulse elements OR, input than the first output of the chromopulse block connecting the key and the input of the first from which are connected by the corresponding inputs of the codes, the other inputs to the right are connected to the output and second sche cerned O ment connected to the OR input of one of the connections with the output of the first input of which is L yuschy

If you need to quickly reduce the control angle 4TT / t, it is enough to send the corresponding signals to the control inputs of the second selector 23, allowing you to pass 2 pulses from one of the outputs of counter 5 connected to the input of selector 23. These two pulses from the output of selector 23 through the second element 22 SHS and the second key 24 is fed to the counting input of the counter 9,

The counter 9 will cause two thyristors to quickly switch, and the third and the following thyristors will already be switched with a control angle equal to. Simultaneously, the pulses from the output of the selector 23 are fed to the subtracting input of the reversible counter

28, which, after passing through to my exit of the first RS flip-flop,

pulses at the output of the Wits signal, allowing the passage of pulses of driver 1 to S — input of trigger 26. These pulses set the specified trigger to state 1, and after the pulse, the pulse from element 22 SHS will go through key 25 to the installation input of counter 9, at the output of which the code corresponding to the thyristor will be set (phase A). The turn-on signal of this thyristor, which appears at the output of block I1, will transfer trigger 26 to the zero state, and the following pulses from the output of element 22 OR will flow to the counting input of counter 9 through the second switch 24, including the thyristors of other phases.

Thus, the introduction of additional elements allows expansion

50

55

the other input of the first OR element is unified with the R input of the first RS-flip-flop, with the output of the first pulse number selector, whose control input is connected to the corresponding outputs of the phase register of the shifting unit, the input of the first number of pulses from the lecturer of the shifting unit, the S-input of the first RS-flip-flop is connected via a generator of short pulses from the output of the element I, one input of which is connected to the output of the phase-shifting tank, another input of the element And connects to the output of the code comparison unit irovatel short momentum | connected to the first input of the second OR ment, the second input of which is n

Adjust the control angle of the rJ. , to increase the control accuracy at any rate of change of the control signal, specified by the register 29.

F o

rmula of invention

60 registrant 29.

register 29.

A device for controlling a valve converter containing a sync pulse shaping unit, the first output of which is connected to the first input of a phase-shifting unit containing a memory register and a master oscillator, a pulse distributor with a counter, a reverse counter, a code comparison unit, which is the purpose of increasing accuracy and expanding the range of control angle adjustment, it is equipped with four keys, two pulse number selectors, two RS-flip-flops, two counters, an And element, formati A short pulse, two OR elements, an input register, the first output of the sync pulse shaping unit is connected to the input of the first key and the input of the first counter, the outputs of which are connected by the corresponding inputs of the code comparison unit, the other inputs of which are bitwise connected to the corresponding outputs of the second counter, the input of which is connected to the output of the first OR element, one input of which is connected to the output of the first key, the control input of which is connected to the

the other input of the first OR element is connected to the R input of the first RS flip-flop, with the output of the first pulse number selector, whose control inputs are connected to the corresponding outputs of the memory register of the phase-shifting unit, the input of the first pulse number selector is connected to the output of the master-generator of the phase-shifting unit, S -the input of the first RS-flip-flop is connected via a short pulse shaper to the output of the element I, one input of which is connected to the output of the phase-shifting unit, the other input of the element I connected to the output of the unit In the codes, the output of the short pulse generator | is connected to the first input of the second element OR, the second input of which is connected to the output of the second selector of the number of pulses, the output of the second element OR through the second key is connected to the counting input and through the third key to the distributor counter installation pulses, the control inputs of the second and third keys are connected respectively to the inverse and direct output of the second RS trigger, the R input of which is connected to the output of the pulse distributor, the S input through the fourth key to oromu output clock generating unit, a control input M. chetRedaktor Pandora

Compiled by, Mironov

Tehred O. Gortvay Corrector I. Muska

Order 4423/55 Circulation 631 Subscription

VNIIPI USSR State Committee

for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab ,, d.4 / 5

Production and printing company, Uzhgorod, st. Project, 4

the key is connected to the overflow output of the reversible counter, the summing input of which is connected to the output of the first pulse number selector, the subtracting input to the output of the second pulse number selector whose input is connected to the output of the phase-shifter counter, and the control inputs are connected to the corresponding outputs of the memory register phase shifting unit, the inputs of the specified register. connected to the corresponding outputs of the input register.

Claims (1)

Claim A device for controlling a valve converter, comprising a clock generating unit, the first output of which is connected to the first input of the phase-shifting unit, containing a memory register and a master oscillator, a pulse distributor with a counter, a deversive counter, a code comparison unit, which differs in that, for the purpose improving accuracy and expanding the range of control angle adjustment, it is equipped with four keys, two pulse number selectors, two RS-flip-flops, two counters, an element And, a shaper m short pulses, the two OR elements, input register, a first output unit for generating synchronization pulses is connected to the input of a first key and input of the first counter, the outputs of which are connected bitwise ssoot-. the corresponding inputs of the code comparison unit, the other inputs of which are bitwise connected to the corresponding outputs of the second counter, the input of which is connected to the output of the first OR element, one input of which is connected to the output of the first key, the control input of which is connected to the direct output of the first RS-trigger, the other input of the first OR element is connected to the R-input of the first RS-trigger, with the output of the first pulse number selector, the control inputs of which are connected to the corresponding outputs of the memory register of the phase-shifting unit, input the first pulse number selector is connected to the output of the phase-shifting unit master oscillator, the S-input of the first 'RS-trigger is connected via the short-pulse generator to the output of the And element, one input of which is connected to the output of the phase-shifting unit, the other input of the And element is connected to the output of the code comparison unit , the output of the short-pulse generator [connected to the first input of the second OR element |, the second input of which is 7 keys to the output of the second pulse number selector, the output of the second OR element through the second key is connected to about the counting input and through the third key - with the installation input of the counter of the pulse distributor, the control inputs of the second and third keys are connected respectively to the inverse and direct output of the second RS trigger, the R-input of which is connected to the output of the pulse distributor, the S-input through the fourth key - to the second the output of the clock generation unit, the fourth key control input is connected to the overflow output of the reverse counter, the summing input of which is connected to the output of the first selector of the number of 5 pulses, subtracting od - with the output of the second selector number of pulses, the input of which is connected to the output of the phase-shifting block counter, and control inputs coupled to respective outputs of the 1 ° phase shifter register memory block, the inputs of said registra.soedineny with respective outputs of the input register,