SU1226365A1 - Apparatus for pulse control - Google Patents

Abstract

The invention can be used to troubleshoot branched chains. The purpose of the invention is to increase the reliability of the control. The device contains elements 1 and 7 AND, element 2 OR, element 3 NOT, RS-flip-flops 6 and 12, driver 5 pulses, generator 8 pulses, driver 9 pulses, delay element 10 and counter 11. In each cycle of operation, the beginning of which coincides with the beginning of the pulse from the generator 8, the splitting of the input signal, which is fixed by means of the counter 11, causes the RS-flip-flop 12 to tip over from the Log state. 1 to Log, O. The signal from the output of the RS flip-flop 12 blocks the flow of pulses from the driver 9 to the RS-flip-flop 6. The introduction of the delay element, counter, RS flip-flop 12, element 7 And allowed to fix not only the information, but the arrival of several pulses in the time allotted for the arrival of only one pulse. 1 il. V. With Exit

Description

The invention relates to electrical measuring equipment and can be used to detect malfunctions in branched chains.

The purpose of the invention is to increase the credibility of the control by fixing not only the loss of information, but also the arrival of several pulses during the time allotted for the arrival of only one pulse.

The drawing shows a block diagram of the device.

A device for controlling pulses contains an AND 1 element, a sequence of an OR 2 element, a HE 3 element, an RS flip-flop 4, a shaper of 5 pulses, an RS flip-flop 6, an AND 7 element and a series-connected pulse generator 8 (low frequency) of a shaper 9 pulses, delay element 10, counter 11 and RS-trigger 12, the output of which is connected to the first input of the element 7, the second input of which is connected to the output of the driver 9 pulses, and the output is connected to the second input of the RS-trigger 6. The output of the element 1 1 is connected with the setup input S of the RS flip-flop 4 and counting input of counter 11. S RS-trigger 12 Setting input connected to the output 10 of the delay element.

Device for controlling pulses operates as follows.

Suppose that all input signals are present at the input of the device, and there is no splitting of the input pulses. When all sources of input pulses (not shown) work properly, the inputs of the AND 1 element and the OR 2 element receive periodic pulses that coincide in phase, and the inputs of the RS flip-flop 4 from the outputs of the AND 1 element and the NO 3 element alternately receive signals that translate RS flip-flop 4 from one state to another with a frequency of input pulses, the input S of the RS flip-flop 6 receives signals from the output of RS flip-flop 4 through the driver 5 pulses. If the pulses are not fragmented, only one pulse from the output of the element I 1 is fed to the input of the counter 11 and the RS-flip-flop 12 does not overturn. The signals from the generator 8 through the pulse shaper 9 and the element 10 reset the counter 11 to the Log state. About and set the RS-trigger 12 in the state of the log. 1. Thus, with

the health of all sources of input signals to the input RS-tr of the gage 6 through the driver 9 and the element And 7 receives signals from the generator B.

From the output of the RS-grigger 6 receives a signal in the form of pulses of high duty cycle at the generator frequency

8 pulses of low frequency.

If one of the sources of input pulses fails (the constant voltage level at one of the inputs of the AND 1 and the OR 2 elements), the output of the RS flip-flop 4 is set to a constant voltage level. In this case, the flow of control signals to the input S of the RS flip-flop 6 is stopped, and the input of R continues to receive pulses from the low-frequency generator 8 through the driver

9 pulses. The output of the RS flip-flop 6 receives a constant voltage level, which signals a fault in the input signal circuit.

Suppose that instead of a single input pulse, a sequence (a bundle) of short pulses arrives, resulting in a split in the input signal. A pack of short pulses comes from the output of the element I 1 to the counting input of the counter 11, the conversion factor (q) of which is chosen from the condition K, 2.

The value of K depends on the ratio of the periods of the frequency of the generator 8 and the input signals. In particular, if these periods coincide, then Y. 2. In this case, splitting the input pulse. Even into two parts triggers trigger 12. If the input signal is split into three (or more) parts, a packet of three arrives at the input of counter 11 ( and more) pulses. But the appearance of the second pulse already causes the appearance of the signal at the output of the counter 11 (transfer) and the overturning of the RS flip-flop 12.

K should be increased if

C

between the two pulses from the generator 8 several periods of the input signals are laid, and its specific value is determined by the parameters of the designed circuit.

The pulse from the output of the counter 11 overturns the RS-flip-flop 12, and the signal from its output closes the element 7. At the same time, the arrival of signals from the forma- tive body 9 to the input of the RS-flip-flop 6

J 1

stops, and pulses from RS flip-flop 4 continue through the shaper 5 pulses at the input. The output of the KZ-flip-flop 6 receives a constant voltage level, which signals the malfunction of the input signals.

The pulse from the generator 8 through the pulse shaper 9 and the delay element 10 resets the counter 11 and the RS flip-flop 12 to the initial state, preparing the device for the next operation cycle.

Thus, in each cycle of operation, the beginning of which coincides with the beginning of the pulse from generator 8, splitting the input signal, fixed with the aid of counter 11, causes a tilting (from Log, 1 to Log, O state) RS-trigger 12, the signal from the output of which blocks the flow of pulses from the imaging unit 9 to the input of the RS flip-flop 6,

Claims (1)

Formula A device for controlling pulses containing the first element And, the first and second RS-flip-flops, the first and the second; pulse shapers, Elector H, Yacola Order 2127/44 Circulation 728 Subscription VNSHPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab ,, d, 4/5 Production and printing company, Uzhgorod, Projecto st., 4 ten 26365L S1I ment, NOT element, pulse generator, the output of which is connected to the input of the second pulse shaper, inputs of the first AND element and OR element are connected to terminals for connecting the test object, the output of the first AND element is connected to the first input of the first RS flip-flop, the second input of which the first element is NOT connected to the output of the OR element, and the output through the first pulse shaper is connected to the first input of the second RS flip-flop, which is different in that, in order to increase the reliability of the control, a delay element is introduced into it, the third, the third RS trigger, the second element And, the first input of which is connected to the output of the third RS trigger, the second input to the output of the second pulse generator and the input of the delay element, and the output to the second input of the second RS trigger, the output of the first element And connected to the first input of the counter, the output of which is connected to the first input of the third RS-flip-flop, the second input of which is connected to the second input of the counter and to the output of the delay element, the output of the second RS-. A trigger is connected to the device's output. 15 20 25 thirty Compiled by N, Pom Ksheva Tehred I. Popovich Corrector L, Patay