SU1109859A1 - Two-channel harmonic oscillator - Google Patents

Abstract

A TWO-CHANNEL HARMONIC VIBRATION GENERATOR, containing a clock generator, the first and second channels, each of which contains a successively connected counter, an EXCLUSIVE OR element and a frequency divider with a variable division factor, a digital-analogue converter, a signal and reference inputs, and a digital-to-analog converter, and the reference inputs of the frequency dividers with a variable division factor, the D / A converter, the signal and reference inputs, and the analog-to-analogue frequency divider, the D / A converter, the signal and reference inputs, and the analog-to-analog converter, the reference and reference inputs, and the analog-to-analog frequency divider, the D / A converter, the signal and reference inputs, and the analog-to-analog converter, the reference and the reference inputs, and a frequency divider with a variable division factor; and the output of the switching unit polar-, ty, while the signal inputs of the frequency dividers with a variable division factor of each of the channels are combined connected to the output of the clock generator, and the reset input of the counter of the first channel is connected to the reset bus, characterized in that, in order to reduce distortions of the output signals, a trigger is entered in each channel between the output of the counter and the input of the polarity switching unit serially connected short pulse shaper and an OR element, the second input of which is combined with another trigger input of the first channel and connected to the reset bus, the input of the short pulse shaper is connected to the output of § trigger The first channel, the reset inputs of variable frequency dividers (L dividing each channel, the counter reset and trigger inputs of the second channel are combined and connected to the output of the OR element, and the variable frequency division dividers of the first and second channels are connected to the signal inputs counters respectively; & This is the second and first channels. U1 with

Description

Even so, it relates to radio engineering, in particular, to measuring and measuring equipment, and can be used to form harmonically oscillations, when it is necessary to form two harmonic signals that are shifted by an angle equal to E- / 2. A two-channel harmonic oscillator is known, which contains a clock generator with an AND element, and in each channel a counter and a digital-analogue converter til. However, the generator does not achieve the required accuracy in setting the phase between the channels. The closest in technical essence to the present invention is a two-channel harmonic oscillator, comprising a clock generator, the first and second channels, each of which contains a serially connected counter, an EXCEPTION element of CHCEE OR, and a variable division divider frequency divider, digital-to-analog converter, signal and reference inputs which are connected respectively with the output of the EXCLUSIVE OR element and the output of the polarity switching unit, while the signal inputs of the frequency dividers with each division channel is combined and connected to the clock generator output, and the reset input of the first channel counter is connected to the reset bus 21. However, in the known two-channel harmonic oscillator, signal distortions occur during a sinusoidal and cosine-zero transition at the time of changing the polarity of the signal input digital-to-analog converter. The purpose of the invention is to reduce output distortion. This goal is achieved by the fact that in a Dukhkanalom a generator of harmonic oscillations containing TOBbut geyero10r, the first and second channels, each of which contains a sequentially connected counter,. EXCLUSIVE T1I element and frequency divider with variable division factor, digital-analogue converter 1, the signal and reference inputs of which connect L respectively to the output element of the EXTRACTOR OR element and the output of the switching unit polarity, with the signal inputs of the frequency dividers with variable division of each of the VHF channel generators of each of the VHF channel generators. connected to the output of the clock generator, and the reset output of the counter of the first channel is connected to the reset bus, in each channel between the output of the counter and the input of the switching unit polarity, as well as introducing serially connected short pulse shaper and OR element, the second input of which is combined with another trigger input of the first channel and connected to the reset bus, the input of the short pulse shaper is connected to the trigger output of the first channel, the frequency divider reset inputs with a variable division factor of each of the channels, the reset inputs of the counter and the trigger of the second channel are combined and connected to the output of the OR element, and the outputs of frequency dividers with a variable coefficient de The first and second channels are connected to the signal inputs of the counters of the second and first channels, respectively. The drawing shows a structural electrical circuit of a two-channel harmonic oscillator. The generator contains a clock generator 1, the first channel 2, the second channel 3, in each of the channels - a divider 4 frequencies with a variable division factor (DPKD), a counter 5, the element SOURCE OR 6, a digital-to-analog converter (DAC) 7, the polarity switching unit 8 , trigger 9, shaper 10 short pulses, the element OR 11 and the tire 12 reset. The generator works in the following way. From the output of the clock generator 1, a uniform pos: the pulses are fed simultaneously to the signal inputs of the DPCD 4 of the first and second channels 2 and 3. In the initial state, after a signal is sent through the reset bus 12, a zero code is set on all the bit outputs of the counters 5. This code is fed to the inputs of the element TOTAL OR 6 of each channel. At the output of the EXCLUSIVE OR 6 element of the first channel 2 there is a zero code, since the second inputs of this element receive a zero signal from the output of the high bit of counter 5. The output of the END-OR element 6 of the second channel 3 is one;;

KH4i (.iv efficiency, because the second inputs of the Element's logo receive a single signal from the high-order output of counter 5. As a result, a pulse sequence is generated at the DPDD 4 output of the second channel 3 and fed to the signal input of the counter 5 of the first channel 2. The specified pulse sequence comes with a maximum frequency and then decreases as the code value on the code of the EXCLUSIVE OR 6 element of the second channel 3 decreases. At the signal input of the counter 5 of the second channel 3, a sequence of pulses is generated Since the code arriving at the control inputs of the PDCD 4 of the first channel 2 changes 6t zero to one, the corresponding signal from the outputs of the EXCLUSIVE OR elements changes the analog signal at the output of ЦА11 7. The polarity of the output signals is generated at the output trigger signals 9.

After the high bit signal of the counter 5 of the first channel 2 changes from zero to one, the code at the output of the EXCLUSIVE OR 6 element changes from a single value to a zero value. The code on the other inputs of the PDKD 4 of the second channel 3 increases from zero to one, respectively, and the output analog signal of the CDL 7 of the second channel 3 increases from zero to the maximum.

When the signal from the trigger output 9 changes from the first channel 2 from zero to one, switching occurs in the switching unit 8 of the polarity and on

MAP 7 input nocryruitT mitschchchich (x) ny signal Oy. With - "the volume of IM and the DAC 7 output is formed by the negative half-wave of the sigo pitch. At the same time, the signal from the output of the trigger 9 of the first channel 2 shaper 10 short impulses {.or spikes out a reset pulse that passes through the logic element OR 1 to both DPDK 4, the counter 5 and the trigger 9 of the second channel 3. This pulse eliminates the time error channels.

Since the switching of the reference voltages by the polarity switching blocks 8 is carried out io to the) rectangular square signals from the flip-flops 9, and a digital signal corresponding to the sine wave and cosine wave is formed after conversion into an EXCLUSIVE OR 6 element, in a two-channel generator it is compensated delays in switching the reference voltages by the polarity switching unit 8. This leads to the elimination of impulse noise in the output analog signals at the moments of changing the sign of harmonic oscillations, which allows to increase the accuracy

oscillation formation.

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In the proposed generator, the distortions of the output signals at extreme points and during a zero crossing are reduced due to the introduction of a short pulse generator, an IL element, and flip-flops. In addition, the speed increases and harmonic oscillations are generated with a phase shift of 90 over a wide frequency range.

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Claims (1)

A TWO-CHANNEL HARMONIC OSCILLATION GENERATOR, comprising a clock, first and second channels, each of which contains a counter connected in series, an EXCLUSIVE OR element and a frequency divider with a variable division coefficient, a digital-to-analog converter, the signal and reference inputs of which are connected EXCLUSIVELY and switching unit polar-, ti, while the signal inputs of frequency dividers with a variable division factor of each channel are combined and sub are connected to the output of the clock generator, and the reset input of the counter of the first channel is connected to the reset bus, characterized in that, in order to reduce distortion of the output signals, a trigger is introduced in each of the channels between the counter output and the input of the polarity switching unit, and a shaper is connected in series short pulses and an OR element, the second input of which is combined with another input of the trigger of the first channel and connected to the reset bus, the input of the shaper of short pulses is connected to the output of the trigger of the first channel, reset inputs of frequency dividers with a variable division coefficient of each channel, reset inputs of a counter and a trigger of the second channel are combined and connected to the output of the OR element, and outputs of frequency dividers with a variable division coefficient of the first and second channels are connected to the signal inputs of the counters of the second and first channels, respectively. .SU., „1109859 1 1109859