SU1099398A2 - Device for transmitting and receiving digital signals - Google Patents

Abstract

DEVICE FOR TRANSMITTING AND RECEIVING DIGITAL SIGNALS by auth.St. No. 978375, characterized in that, for the sake of noise immunity, serially connected one-vibrator and OR element are inputted on the transmitting side, the output of the digital signal source is connected to the second input of the first AND element, and the output of the clock generator is connected to the first input the second element And through the one-shot, on the receiving side entered the register, an additional element And and the fourth trigger, and the output of the first trigger is connected to the receiver of the digital signal 4fepe3 register, and to the first input of the additional element And, the second input of which is connected to another output of the register, the second input of which is combined with the first input of the fourth trigger, S and the output of the inverter, the output of the second trigger connected to the input of the sync signal extraction unit through the third input of the additional element And, the fourth input which is connected to the output of the fourth trigger, the second input of which is connected to the output of the second trigger. ; about with so 00

Description

The invention relates to telecommunications and can be used to transmit and receive signals in digital systems. According to the main auth. No. 978375, a device for transmitting and receiving digital signals is known, which contains on the transmitter side a digital signal source with a clock source, the output of which is connected to the input of the pulse former, the first output of which is connected to the first input of the first element I, the output of which is connected to the first the input of the adder, the output of which is connected via a trigger to the input of the output matching unit, the driver of the clock signal and the second element And, the output of which is connected to the second input of the adder, the second input of the second The element I is connected to the second output of the pulse generator, on the receiving side a clock signal receiver, an input matching unit, the output of which is connected through a sequentially connected filter and a pulse shaper connected to the first input of the first single vibrator and to the first input of the first And element, whose output through the second single vibrator connected to the first input of the first trigger, the second input of which is connected to the second input of the first one-oscillator, sync signal output unit, two triggers, resonant unit and inverter, output which is connected to the receiver input clock signal, the second input of the first trigger and the first input of the second trigger, the second input of which is connected to the input of the third trigger, the first input of which is connected to the output of the first one-oscillator and the input of the resonant unit, the output of which is connected to the second input of the first element And, the second input of the third trigger and the input of the inverter 1. However, the known device is characterized by insufficient noise immunity. The circuit of the invention is an increase in noise immunity: The goal is achieved by the fact that the device for transmitting and receiving digital signals contains on the transmitting side a source of a broadband signal with a clock source, the output of which is connected to the input of the pulse shaper. the first output of which is connected to the first input of the first element I, the output of which is connected to the first input of the adder, the output of which is connected via a trigger to the input of the output matching unit, the clock generator and the second element I, the output of which is connected to the second input of the adder, the second input of the second element And is connected to the second output of the pulse generator, at the receiving side - the receiver of the clock signal, the input matching unit, the code of which through a serially connected filter and driver pulse in connected to the first input of the first one-shot and to the first input of the first element I, the output of which is connected to the first input of the first trigger through the second one-shot, the second input of which is connected to the second input of the first one-shot, clock signal, two trigger, resonant unit and inverter, vrsod which is connected to the receiver input of the clock signal, the second input of the first trigger and the first input of the second trigger, the second input of which is connected to the output of the first one-oscillator and the input of the resonant unit, the output which is connected to the second input of the first element AND, the second input of the third trigger and the input of the inverter, serially connected one-vibrator and the OR element are inputted on the transmitting side, the digital signal source output is connected to the second input of the first AND element, and the clock generator output is connected to the first input of the second element And through the odiovibrator, on the receiving side entered the register, an additional element And and the fourth trigger, and the output of the first trigger is connected to the receiver digital signal through the register and to the first input of the additional element I, the second input of which is connected to another output of the register, the second input of which is combined with the first input of the fourth trigger, and the output of the inverter the output of the second trigger connected to the input of the block of the clock signal through the third input of the additional element I The fourth input of which is connected to the output of the fourth flip-flop, the second input of which is connected to the output of the second flip-flop. Fig. 1 shows a structural electrical circuit of the device proposed; 2 shows timing diagrams for the operation of the device. A device for transmitting and receiving digital signals contains a 1-digit signal source, CLI element 2, IZ element, clock source 4, pulse generator 5, clock signal generator 6, one-shot 7, adder 8, AND 9, trigger 10, output matching unit 11, input matching unit 12, filter 13, shaper 14 pulses, one-shot 15, resonant block 16, inverter 17, clock receiver 18, AND 19 element, one-shot 20, trigger 21, register 22, digital signal receiver 23, triggers 24-26, additional element & 27 block 28 clock sync. The device works as follows. The signal (fig. 2a) from digital signal source 1 through the element OR 2 is supplied to one of the inputs of element 3. The clock signal (fig. 25) from the source of 4 clock signal is fed through the pulse shaper 5 to the additional input of element 3. .2 c) from the imaging unit 6 through the one-shot 7 (fig.2g) is fed to the second input of the element OR2, where it is added to the digital signal (fig.2d). The pulses of the first output of the imaging set 5 pulses (fig.2e) coinciding with the positive1m voltage signal element And 3 (Fig.2zh), put on the first input The adder 8, and the second output pulses of the shape of the 5 impulses (fig.2z) in the absence of a pause in the signal of the one-shot 7 (fig.2i) are fed through the element 9 to the second input of the adder 8 (fig.2k) the total pulse sequence (fig. 2 l) generates at the output of series-connected trigger 10. and output matching unit 1 a relative bi-pulse signal (Fig. 2m). Its transitions between the 0 level {at the boundaries of the clock intervals carry signs of a digital signal (the presence of a transition when transmitting is general 1, and the absence - at transmitting 0), Transitions in the middle, clock intervals are signs of a clock signal, and their absence characterizes cyclic signal transmission. At the same time, due to the compulsory transfer of units at two clocks and the absence of transitions in the middle of clock intervals during the transmission of the cyclic signal, the linear signal is balanced by a constant component (shaded areas in Fig. 2m). A relative bi-pulse signal with signs of three common-mode signals, passed through a physical circuit, an input matching unit 12 and a filter 13, is fed to a pulse shaper 14 (Fig. 2n). From this sequence, using the signal of the one-shot 15 (FIG. 2o), the resonant unit 16 (FIG. 2p) and the inverter 17 restore the clock signal (FIG. 2 p) to the clock receiver 18. Due to the feedback from the output of the inverter 17 and the inertia of the resonant unit 16, only pulses located in the middle of the clock intervals — and absent only during the transmission of rare signs of a cycle signal — are drawn from the mixture with a single vibrator 15 The clock signal of the resonant unit 16 (FIG. 2p) passes through the element And 19 the pulses of the driver 14 that occur at the boundaries of the clock {interval) and the corresponding transmission of units of digital and cyclic signals (figure 2c). An increase in their duration (Fig. 2t) for sure reception occurs in the one-shot 20, and overwriting the clock signal (Fig. 2p) with positive transitions of the input signal of the trigger 21 to its inverse output allows restoring the digital signal (Fig. 2h), which (fig.2F) register 22 enters (fig.2x) into digital signal receiver 23. The absence of transitions in the middle of the clock intervals during the transmission of the cyclic signal and, accordingly, a high voltage level at the output of the one-shot 15 (FIG. 2 °) at the moments of positive transitions of the signal of the resonant unit 16 (FIG. 2.p) allows trigger 24

to generate a pulse of the cyclic signal (sync signal) (FIG. 2c). To match its temporal position with the limits of the clock intervals of the digital signal (Fig. 2k), the trigger signal 24 (Fig. 2c) is rewritten by positive clock transitions (Fig. 2p) to the output of the trigger 25 (Fig. 2h) and further to the output (Fig. 2sh) trigger 26.

For practical elimination of false signs of a cyclic signal, the pulse sequence of a digital signal is delayed in register 22 (fig.2ph) and the received pulse of cyclic signal (fig.2h) in trigger 26 (fig.2sh). Therefore, the pulse at the output of the additional element AND 27 (Fig. 2) turns out only in the case of four events coinciding: with positive pulses at two adjacent clock

intervals in the digital signal, i.e. on the first (FIG. 2F) and second (FIG. 2x) outputs of register 22, as well as when positive pulses appear at two adjacent clock intervals at the input (FIG. 2h) and output (FIG. 2w) of trigger 26, which is noted shaded areas in the time diagrams listed.

As a result of the coincidence of the listed events on the input of the additional element I 27, a pulse of the cyclic signal is generated (Fig.2 | d) for block 28. Its duration and

relative position relative to

received digital signal (fig.2x) correspond to the transmitted signal (fig.2c | and fig.2.2 c).

Thus, in the proposed device, noise immunity is enhanced.

No. T

Claims (1)

DEVICE FOR TRANSMISSION AND RECEIVING OF DIGITAL SIGNALS by ed. No. 978375, characterized in that, in order to increase the noise immunity, serially connected single-vibrator and OR element are introduced on the transmitting side, and the output of the digital signal source is connected to the second input of the first AND element through the OR element, and the output of the clock shaper is connected to the first input the second element And through a single vibrator, on the receiving side a register is entered, an additional element And and a fourth trigger, and the output of the first trigger is connected to the receiver of the digital signal through the register, and to the input of the additional element And, the second input of which is connected to another output of the register, the second input of which is combined with the first input of the fourth trigger, and the output of the inverter, the output of the second trigger is connected to the input of the clock allocation unit through the third input of the additional element And, the fourth input of which is connected to the output of the fourth trigger, the second input of which is connected to the output of the second trigger. SU „., 1099398>