SU1042019A1 - Microprogram control device - Google Patents

Abstract

MICROPRIRGRAMMABLE CONTROL DEVICE, containing the external and internal microoperations formers, the address generation unit following the microcommand, the trigger, the microinstruction register, four groups of AND elements and the first decoder connected to the first input elements And the first and groups r control outputs - with the first and single inputs of the trigger, single and zero output kotoro-. It is connected with the second outputs of the elements of the first and second groups and with the first inputs of the elements of the third and fourth groups, respectively, the outputs of the elements of the first and second, groups are connected respectively to each of the first and second registers. . . microinstructions, the first group of exits. which are connected respectively with the second input elements And the fourth and third groups, outputs. which are connected to the inputs of the first decoder, the outputs of which are connected to the first group of inputs of the former — external microoperations, the outputs of which are connected to B1 of the device, which, in order to reduce the equipment, it contains an additional four groups of elements And and two decoders, with the second and third groups of outputs of the first and second registers of micro-instructions connected to the first inputs of elements of the And the fifth, sixth and eighth groups, respectively. proper, single and zero you (L trigger moves are connected respectively to the second inputs of the elements of the sixth, eighth and fifth, seventh j groups, outputs of the elements And the fifth group of the sixth groups are connected to the second group of inputs of the external microoperator, the outputs of which are connected to the first group of inputs of the imager of internal microoperations, 4 to the second and third groups. The inputs of which are connected respectively to the outputs of the first and third decoders, to the outputs of the elements And the seventh and eighth .g SCP connected to inputs of decoder treteg. (

Description

The invention is related to computing and can be used in digital computer control devices.

A microprogram control device is known that contains registers, decoders, a clock generator and a logic circuit of AND and OR j elements.

The drawbacks of such devices are the large amount of equipment, the complexity of creating firmware, and the complexity of introducing new microcommands.

The closest to the invention is a microprogrammed control device containing the first and second micro-command registers, the driver of external micro-operations, the internal micro-operations fdrmier, the address-generating unit of the next microdirectory.

The disadvantage of this device is a significant increase in the number of equipment with an increase in the complexity of the firmware implemented.

The purpose of the invention is to reduce the amount of equipment.

This goal is achieved by the fact that in the firmware control device containing the former. Whether external and internal micro-operations are 30 days, the block of forming the address of the next microcommand, trigger, two. register / microinstructions, four groups of elements And and the first decoder, (1 what is the output of the internal driver; 35 of these microoperations are connected to the input of the next address microcommand formation block, informational outputs of which are connected to the first inputs of the And elements of the first and second groups 7 / -. 40 output outputs with zero and single trigger inputs / single and zero outputs that are connected. With the second inputs of the elements of the first and second groups and with the first j of the input elements of the “third and fourth groups, respectively, the outputs of the elements Both the first and second groups are connected respectively to the inputs of riepBoro and the second micro-command registers, the first groups of outputs O are connected respectively to the second inputs of elements of the fourth and third groups, the outputs of which are connected to the inputs of the first decoder, the outputs of which are connected to the first group the inputs of the external microoperator, the outputs of which are connected to the outputs of the device, were additionally introduced four ri3yn elements And and two decoders, 60 with the second and third groups of outputs of the first and second p giste microinstructions are connected to first elements vho- rows and the fifth, sixth and eighth groups, respectively,

the single and 1 zero outputs of the trigger are connected respectively to the second inputs of the elements of the sixth, eighth and fifth, seventh groups, the yykhods of the elements And the fifth and sixth groups are connected to the second group of inputs FO1EMI. The external microoperations solver and with the inputs of the second decoder, the outputs of which are connected to the first group of inputs of the imaging unit — internal microoperations, the second and third groups of inputs are connected respectively to the outputs of the first and third decoders, the outputs of elements And the seventh and eighth groups are connected to the inputs of the third decoder.

The drawing shows a structural diagram of the proposed device.

The device contains registers 1 and 2 of micro-instructions decoders 3, 4 and 5, drivers 6 and 7 of external and internal micro-operations, block .8 of forming the address of the next micro-command, trigger 9, groups of elements I 10 - 17.

Registers of microinstructions are divided into three floors. .

. The device is a firmware automaton with a special way of encoding the axes; The essence of this method is as follows. The entire set of output signals taken from the imager of external microoperations is divided into several groups, with the number of output signals in Aceh groups being equal to one or more. The main condition for this partitioning is that only one output signal can be output at a time. Each group is assigned a specific code, which is recorded in the second field of the register by 1 term or in the second field of the second register 2 microcommands.

The input signals within the same group are numbered from 1 to GM. The value of m must be equal to the number of bits in the first field of the register of 1 micro-instructions and equal to the number of bits in the first field of the second register of 2 micro-commands, since each signal within the same group puts its corresponding first bits with c. the first half of the register of 1 microinstructions and its bit of the first half of the register of 2 microcommands.

Then the set of output signals taken from the former of .6 external micro-operations uniquely corresponds to its combination of the values of the first and second fields of register 1 micro-instructions or the first and second fields of register 2 micro-commands. At the same time, in order to form the output signals in the driver of external micro-operations 6, the first field of register 1 micro-instructions or the first field of register 2 micro-commands is not required. Any combination of output signals taken from the imager of 6 external microoperations can be interpolated in the algorithm several times. Therefore, the third field is entered into the micro-command register 1, and the third field is entered into the micro-command register 2, which records how many times the corresponding combination of output signals from the imager 6 external micro-operations were generated in this algorithm. The value of the set of output signals determined by the values of the first and second fields of register 1 micro-commands or the values of the first and second fields of the 2 micro-commands register, and the value of the third field of the 1 micro-commands or the third field of the 2 micro-commands corresponding to this set uniquely determine the state of the microprogram The automatic device in the proposed device is used as a status code,. . .. ..., V The device works as follows 66 times; - -. -, ;;; The trigger is set to one. The signal from the single output of the trigger 9 is fed to the inputs of the AND elements of groups 10 and groups 15–16 and 17. The code of the microxlands being executed is stored in register 2 of micro-instructions. At the same time, it is stored in its first field. : with output signals within one. In the second field, the number of the output signal group is stored, and in the third field, a code is stored that indicates how many times this algorithm encountered the output - - signals combination. .,. Through open elements AND group 15, output signals from the nepsoiro field reg-ister 2 micro-commands are transferred to the inputs of the imager 6 external microoperations and to the inputs of the decoder 3. Through open elements AND group 16, the number of the output group, signals from the second floor of the register 2 is fed to the inputs of the lipapto 4 From the output of the decoder 4, the decrypted number of the group of the signal A signal arrives at the input of the body 6 of the external micro-operations and at the input of the driver 7 of the internal micro-operations. The former of micro micro-operations using the signals at its inputs generates the necessary signals. The signal from the output of the decoder 3 arrives at the input of the imager 7 internal micro-operations. The code from the third floor of the register 2 microxmold through the open elements And group 17 enters the inputs of the decoder 5. From the output of the decoder 5, this signal in decrypted form enters the input of the imaging unit 7 internal microoperations, which, under the action of signals at its inputs, forms the signals arriving at the input block 8 forming the address of the following microcommand. The next addressable microinstruction block 8 generates the address of the next microcoman-g. d, which, through the open elements AND of group 10, is written in the status code to register 1 of microsecond commands. At the same time, the zero input of the trigger 9 from the control output of the block 8 of the formation of the address of the next microcommand receives a signal of the sign of recording information in the register 1 of the microcommands. By this signal, trigger 9 is set to s zero state. From the zero output of the trigger 9, the clock pulse of the second sequence arrives at the inputs of the elements AND of group 11 and groups 12, 13 and 14. The microinstruction code executed in the second sequence cycle is stored in register 1 of the micro Land. From the outputs of register 1 of microcommands this code elements of groups 12 and 13 and the decoder 4 is fed to the inputs of the pho {4piatel external microoperations, which produces appropriate output signals. Through the elements of AND groups 12, 13 and 14, decoders 3 and 4 and the former 7 micro-ops shaper, the micro-command code from the micro-command register 1 enters the input of the next-micro-address block 8 to generate the address. The C-information outputs of the block of 8 forming the address of the next micro-command through the open elements AND group 11, this code is written into the register 2 of the micro-commands, with this signal the trigger 9 is set to one state. The procedure described below shows the operation of the device. Replacing a single complex decoder with a large number of inputs with three decoders with a smaller number of inputs and simplifying the external microoperations maker makes it possible to reduce the amount of equipment compared to the prototype. With ect, the most significant equipment savings are obtained when implementing complex algorithms that require the use of high-resolution registers and complex matrices. Thus, for a device with bit registers of micro-instructions, the required number of diodes is reduced by 1200.

Claims (1)

FIRMWARE “DEVICE”. CONTROLS containing shapers of external and internal microoperations, a block for generating the address of the next microcommand, a trigger, two__ microcommand registers, four groups of AND elements and a first decoder, the output of the shaper of internal microoperations being connected to the input of the next microcommand's address forming unit, the information outputs of which are connected to the first inputs of the elements And the first and second. groups, control outputs - with zero and single inputs of the trigger, the single and zero outputs of which are connected to the second inputs of the elements And the first and second groups and to the first inputs of the elements And the third and fourth groups, respectively, the outputs of the elements And the first and second, groups are connected respectively to inputs of the first and second registers. . microcommands, the first groups of outputs of which are connected respectively to the second inputs of the elements of the fourth and third groups, the outputs of which are connected to the inputs of the first decoder, the outputs of which are connected to the first group of inputs of the shaper — external microoperations, the outputs of which are connected to the outputs of the device, In addition, in order to reduce equipment, it additionally contains four groups of AND elements and two decoders, the second and third groups of outputs of the first and second registers of microcommands connected with the first inputs of the elements And the fifth,. the sixth and seventh, eighth troups respectively. Accordingly, the single and zero outputs of the trigger are connected respectively to the second inputs of the elements of the sixth, eighth and fifth, seventh groups, the outputs of the elements of the fifth and ι. the sixth group is connected to the second group of inputs of the shaper of external microoperations and to the inputs of the second decoder, the outputs of which are connected to the first group of inputs of the shaper of internal microoperations, the second and third groups of inputs of which are connected respectively with the outputs of the first and third decoders, with the outputs of the elements And the seventh and the eighth groups are connected to the inputs of the third Lb decoder.