SG30537G - Integrated circuit electromigration monitor - Google Patents

Integrated circuit electromigration monitor

Info

Publication number
SG30537G
SG30537G SG1995903324A SG1995903324A SG30537G SG 30537 G SG30537 G SG 30537G SG 1995903324 A SG1995903324 A SG 1995903324A SG 1995903324 A SG1995903324 A SG 1995903324A SG 30537 G SG30537 G SG 30537G
Authority
SG
Singapore
Prior art keywords
electromigration
monitor
integrated circuit
integrated
circuit
Prior art date
Application number
SG1995903324A
Other languages
English (en)
Inventor
Daniel Patrick Cheshire
Anthony Stephen Oates
Original Assignee
At & T Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by At & T Corp filed Critical At & T Corp
Publication of SG30537G publication Critical patent/SG30537G/en

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2855—Environmental, reliability or burn-in testing
    • G01R31/2856—Internal circuit aspects, e.g. built-in test features; Test chips; Measuring material aspects, e.g. electro migration [EM]
    • G01R31/2858—Measuring of material aspects, e.g. electro-migration [EM], hot carrier injection
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26—Testing of individual semiconductor devices
    • G01R31/2642—Testing semiconductor operation lifetime or reliability, e.g. by accelerated life tests
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
    • H01L22/34—Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Automation & Control Theory (AREA)
  • Environmental & Geological Engineering (AREA)
  • General Engineering & Computer Science (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
SG1995903324A 1990-03-21 1991-03-12 Integrated circuit electromigration monitor SG30537G (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US49746790A 1990-03-21 1990-03-21

Publications (1)

Publication Number Publication Date
SG30537G true SG30537G (en) 1995-09-01

Family

ID=23977004

Family Applications (1)

Application Number Title Priority Date Filing Date
SG1995903324A SG30537G (en) 1990-03-21 1991-03-12 Integrated circuit electromigration monitor

Country Status (5)

Country Link
EP (1) EP0448273B1 (ja)
JP (1) JPH04223355A (ja)
DE (1) DE69104248T2 (ja)
HK (1) HK188595A (ja)
SG (1) SG30537G (ja)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3611338B2 (ja) * 1993-06-21 2005-01-19 財団法人国際科学振興財団 電流駆動導電性材料評価方法
DE10108915A1 (de) * 2001-02-23 2002-09-12 Infineon Technologies Ag Elektromigrations-Teststruktur zur Erfassung einer Zuverlässigkeit von Verdrahtungen
DE10227829A1 (de) * 2002-06-21 2004-01-15 Infineon Technologies Ag Verfahren zum Überwachen der Herstellung und zum Bewerten der Qualität einer Metallisierungsanordnung sowie zugehörige Erfassungsvorrichtung
DE102006049791A1 (de) * 2006-10-21 2008-04-30 X-Fab Semiconductor Foundries Ag Teststruktur für hochbeschleunigte Elektromigrationstests für dicke Metallisierungssysteme von Festkörperschaltkreisen
FR2964749A1 (fr) * 2010-09-14 2012-03-16 St Microelectronics Sa Procede et dispositif de mesure de fiabilite d'un circuit integre
CN113782516B (zh) * 2021-08-20 2024-04-05 长江存储科技有限责任公司 电迁移测试结构、系统、存储器、制造方法及测试方法
CN114264926A (zh) * 2021-11-26 2022-04-01 中国电子科技集团公司第五十八研究所 单侧引出电压测试焊盘的单通孔跨层型电迁移测试结构

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USRE32625E (en) * 1983-01-05 1988-03-15 Syracuse University Dynamic testing of electrical conductors
US4739258A (en) * 1986-07-11 1988-04-19 Syracuse University Dynamic testing of thin-film conductor
EP0281553A1 (en) * 1986-09-17 1988-09-14 THE GENERAL ELECTRIC COMPANY, p.l.c. Method of manufacturing integrated circuits

Also Published As

Publication number Publication date
EP0448273B1 (en) 1994-09-28
EP0448273A1 (en) 1991-09-25
JPH04223355A (ja) 1992-08-13
DE69104248T2 (de) 1995-01-26
HK188595A (en) 1995-12-22
DE69104248D1 (de) 1994-11-03

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