SG139533A1 - Method for manufacturing semiconductor wafer - Google Patents

Method for manufacturing semiconductor wafer

Info

Publication number
SG139533A1
SG139533A1 SG200401965-9A SG2004019659A SG139533A1 SG 139533 A1 SG139533 A1 SG 139533A1 SG 2004019659 A SG2004019659 A SG 2004019659A SG 139533 A1 SG139533 A1 SG 139533A1
Authority
SG
Singapore
Prior art keywords
semiconductor wafer
bumps
manufacturing
manufacturing semiconductor
resin layer
Prior art date
Application number
SG200401965-9A
Other languages
English (en)
Inventor
Kazuma Sekiya
Kazuhisa Arai
Original Assignee
Disco Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Disco Corp filed Critical Disco Corp
Publication of SG139533A1 publication Critical patent/SG139533A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0556Disposition
    • H01L2224/05568Disposition the whole external layer protruding from the surface
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    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05573Single external layer
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    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
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    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
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    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/113Manufacturing methods by local deposition of the material of the bump connector
    • H01L2224/1133Manufacturing methods by local deposition of the material of the bump connector in solid form
    • H01L2224/1134Stud bumping, i.e. using a wire-bonding apparatus
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    • H01L2224/10Bump connectors; Manufacturing methods related thereto
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    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
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    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13144Gold [Au] as principal constituent
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    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/731Location prior to the connecting process
    • H01L2224/73101Location prior to the connecting process on the same surface
    • H01L2224/73103Bump and layer connectors
    • H01L2224/73104Bump and layer connectors the bump connector being embedded into the layer connector
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    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00013Fully indexed content
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    • H01L2924/01004Beryllium [Be]
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    • H01L2924/01005Boron [B]
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    • H01L2924/01074Tungsten [W]
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Wire Bonding (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
SG200401965-9A 2003-04-08 2004-04-07 Method for manufacturing semiconductor wafer SG139533A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003104038A JP2004311767A (ja) 2003-04-08 2003-04-08 半導体ウェーハの製造方法

Publications (1)

Publication Number Publication Date
SG139533A1 true SG139533A1 (en) 2008-02-29

Family

ID=33127776

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200401965-9A SG139533A1 (en) 2003-04-08 2004-04-07 Method for manufacturing semiconductor wafer

Country Status (5)

Country Link
US (1) US20040203187A1 (zh)
JP (1) JP2004311767A (zh)
CN (1) CN1536634A (zh)
DE (1) DE102004017182A1 (zh)
SG (1) SG139533A1 (zh)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7351657B2 (en) * 2005-06-10 2008-04-01 Honeywell International Inc. Method and apparatus for applying external coating to grid array packages for increased reliability and performance
JP5728423B2 (ja) * 2012-03-08 2015-06-03 株式会社東芝 半導体装置の製造方法、半導体集積装置及びその製造方法
JP6850099B2 (ja) * 2016-09-23 2021-03-31 株式会社岡本工作機械製作所 半導体装置の製造方法及び半導体製造装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4249827B2 (ja) * 1998-12-04 2009-04-08 株式会社ディスコ 半導体ウェーハの製造方法
US6897566B2 (en) * 2002-06-24 2005-05-24 Ultra Tera Corporation Encapsulated semiconductor package free of chip carrier
US6787392B2 (en) * 2002-09-09 2004-09-07 Semiconductor Components Industries, L.L.C. Structure and method of direct chip attach

Also Published As

Publication number Publication date
JP2004311767A (ja) 2004-11-04
CN1536634A (zh) 2004-10-13
US20040203187A1 (en) 2004-10-14
DE102004017182A1 (de) 2004-11-18

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