SG135010A1 - Semiconductor chip with gate dielectrics for high-performance and low- leakage applications - Google Patents

Semiconductor chip with gate dielectrics for high-performance and low- leakage applications

Info

Publication number
SG135010A1
SG135010A1 SG200307767-4A SG2003077674A SG135010A1 SG 135010 A1 SG135010 A1 SG 135010A1 SG 2003077674 A SG2003077674 A SG 2003077674A SG 135010 A1 SG135010 A1 SG 135010A1
Authority
SG
Singapore
Prior art keywords
performance
low
semiconductor chip
gate dielectrics
leakage applications
Prior art date
Application number
SG200307767-4A
Other languages
English (en)
Inventor
Yee-Chia Yeo
Fu-Liang Yang
Chenming Hu
Original Assignee
Taiwan Semiconductor Mfg
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiwan Semiconductor Mfg filed Critical Taiwan Semiconductor Mfg
Publication of SG135010A1 publication Critical patent/SG135010A1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823462—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate insulating layers, e.g. different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Semiconductor Memories (AREA)
  • Formation Of Insulating Films (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
SG200307767-4A 2003-01-02 2003-12-30 Semiconductor chip with gate dielectrics for high-performance and low- leakage applications SG135010A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/335,962 US6906398B2 (en) 2003-01-02 2003-01-02 Semiconductor chip with gate dielectrics for high-performance and low-leakage applications

Publications (1)

Publication Number Publication Date
SG135010A1 true SG135010A1 (en) 2007-09-28

Family

ID=32680894

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200307767-4A SG135010A1 (en) 2003-01-02 2003-12-30 Semiconductor chip with gate dielectrics for high-performance and low- leakage applications

Country Status (4)

Country Link
US (1) US6906398B2 (zh)
CN (1) CN1253926C (zh)
SG (1) SG135010A1 (zh)
TW (1) TWI292589B (zh)

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US8357617B2 (en) * 2008-08-22 2013-01-22 Taiwan Semiconductor Manufacturing Company, Ltd. Method of patterning a metal gate of semiconductor device
US8791001B2 (en) * 2008-09-08 2014-07-29 Taiwan Semiconductor Manufacturing Company, Ltd. N2 based plasma treatment and ash for HK metal gate protection
CN102194692A (zh) * 2010-03-04 2011-09-21 中国科学院微电子研究所 一种半导体器件的制造方法
CN102214687A (zh) * 2010-04-07 2011-10-12 中国科学院微电子研究所 一种栅堆叠结构、半导体器件及二者的制造方法
CN102956465A (zh) * 2011-08-24 2013-03-06 中芯国际集成电路制造(上海)有限公司 金属栅极和mos晶体管的形成方法
US10658361B2 (en) 2011-12-28 2020-05-19 Intel Corporation Methods of integrating multiple gate dielectric transistors on a tri-gate (FINFET) process
CN104284964A (zh) 2012-05-16 2015-01-14 雪佛龙美国公司 从流体中去除汞的工艺、方法和系统
WO2013173579A1 (en) 2012-05-16 2013-11-21 Chevron U.S.A. Inc. Process, method, and system for removing mercury from fluids
US9447674B2 (en) 2012-05-16 2016-09-20 Chevron U.S.A. Inc. In-situ method and system for removing heavy metals from produced fluids
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US8916439B2 (en) * 2012-07-20 2014-12-23 Monolithic Power Systems, Inc. Method for forming dual gate insulation layers and semiconductor device having dual gate insulation layers
CN103824771A (zh) * 2012-11-16 2014-05-28 中芯国际集成电路制造(上海)有限公司 栅氧化层的形成方法
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US9122828B2 (en) 2013-05-17 2015-09-01 Taiwan Semiconductor Manufacturing Co., Ltd. Apparatus and method for designing an integrated circuit layout having a plurality of cell technologies
US9437470B2 (en) * 2013-10-08 2016-09-06 Cypress Semiconductor Corporation Self-aligned trench isolation in integrated circuits
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US5960289A (en) * 1998-06-22 1999-09-28 Motorola, Inc. Method for making a dual-thickness gate oxide layer using a nitride/oxide composite region
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US6706581B1 (en) * 2002-10-29 2004-03-16 Taiwan Semiconductor Manufacturing Company Dual gate dielectric scheme: SiON for high performance devices and high k for low power devices

Also Published As

Publication number Publication date
US20040129995A1 (en) 2004-07-08
TW200412626A (en) 2004-07-16
CN1516242A (zh) 2004-07-28
TWI292589B (en) 2008-01-11
US6906398B2 (en) 2005-06-14
CN1253926C (zh) 2006-04-26

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