SG131874A1 - Method for recycling an epitaxied donor wafer - Google Patents
Method for recycling an epitaxied donor waferInfo
- Publication number
- SG131874A1 SG131874A1 SG200607051-0A SG2006070510A SG131874A1 SG 131874 A1 SG131874 A1 SG 131874A1 SG 2006070510 A SG2006070510 A SG 2006070510A SG 131874 A1 SG131874 A1 SG 131874A1
- Authority
- SG
- Singapore
- Prior art keywords
- epitaxied
- recycling
- donor wafer
- donor
- wafer
- Prior art date
Links
- 238000000034 method Methods 0.000 title 1
- 238000004064 recycling Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02032—Preparing bulk and homogeneous wafers by reclaiming or re-processing
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Recrystallisation Techniques (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0510596A FR2892228B1 (fr) | 2005-10-18 | 2005-10-18 | Procede de recyclage d'une plaquette donneuse epitaxiee |
US11/386,967 US20070087526A1 (en) | 2005-10-18 | 2006-03-21 | Method of recycling an epitaxied donor wafer |
Publications (1)
Publication Number | Publication Date |
---|---|
SG131874A1 true SG131874A1 (en) | 2007-05-28 |
Family
ID=37771120
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG200607051-0A SG131874A1 (en) | 2005-10-18 | 2006-10-10 | Method for recycling an epitaxied donor wafer |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP1777735A3 (ko) |
JP (1) | JP2007116161A (ko) |
KR (1) | KR100840428B1 (ko) |
SG (1) | SG131874A1 (ko) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2917232B1 (fr) | 2007-06-06 | 2009-10-09 | Soitec Silicon On Insulator | Procede de fabrication d'une structure pour epitaxie sans zone d'exclusion. |
EP2015354A1 (en) * | 2007-07-11 | 2009-01-14 | S.O.I.Tec Silicon on Insulator Technologies | Method for recycling a substrate, laminated wafer fabricating method and suitable recycled donor substrate |
DE102007032969A1 (de) | 2007-07-16 | 2009-01-29 | Knorr-Bremse Systeme für Nutzfahrzeuge GmbH | Vorrichtung zum Vorauserkennen von Schubbetriebsphasen eines Fahrzeugs |
KR100873299B1 (ko) * | 2007-08-20 | 2008-12-11 | 주식회사 실트론 | Ssoi 기판의 제조방법 |
FR2928775B1 (fr) | 2008-03-11 | 2011-12-09 | Soitec Silicon On Insulator | Procede de fabrication d'un substrat de type semiconducteur sur isolant |
FR2929758B1 (fr) * | 2008-04-07 | 2011-02-11 | Commissariat Energie Atomique | Procede de transfert a l'aide d'un substrat ferroelectrique |
FR3048548B1 (fr) * | 2016-03-02 | 2018-03-02 | Soitec | Procede de determination d'une energie convenable d'implantation dans un substrat donneur et procede de fabrication d'une structure de type semi-conducteur sur isolant |
CN109478493A (zh) * | 2016-07-12 | 2019-03-15 | Qmat股份有限公司 | 供体衬底进行回收的方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20050026426A1 (en) * | 2003-07-29 | 2005-02-03 | Christophe Maleville | Method for producing a high quality useful layer on a substrate |
US20050029224A1 (en) * | 2001-04-13 | 2005-02-10 | Bernard Aspar | Detachable substrate or detachable structure and method for the production thereof |
US20050196937A1 (en) * | 2004-03-05 | 2005-09-08 | Nicolas Daval | Methods for forming a semiconductor structure |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3500063B2 (ja) * | 1998-04-23 | 2004-02-23 | 信越半導体株式会社 | 剥離ウエーハを再利用する方法および再利用に供されるシリコンウエーハ |
US6524935B1 (en) * | 2000-09-29 | 2003-02-25 | International Business Machines Corporation | Preparation of strained Si/SiGe on insulator by hydrogen induced layer transfer technique |
US7008857B2 (en) * | 2002-08-26 | 2006-03-07 | S.O.I.Tec Silicon On Insulator Technologies S.A. | Recycling a wafer comprising a buffer layer, after having separated a thin layer therefrom |
EP1588415B1 (en) * | 2003-01-07 | 2012-11-28 | Soitec | Recycling by mechanical means of a wafer comprising a taking-off structure after taking-off a thin layer thereof |
JP2004247610A (ja) * | 2003-02-14 | 2004-09-02 | Canon Inc | 基板の製造方法 |
FR2855909B1 (fr) * | 2003-06-06 | 2005-08-26 | Soitec Silicon On Insulator | Procede d'obtention concomitante d'au moins une paire de structures comprenant au moins une couche utile reportee sur un substrat |
-
2006
- 2006-10-05 EP EP06121833A patent/EP1777735A3/fr not_active Withdrawn
- 2006-10-10 SG SG200607051-0A patent/SG131874A1/en unknown
- 2006-10-13 KR KR1020060099717A patent/KR100840428B1/ko not_active IP Right Cessation
- 2006-10-18 JP JP2006284086A patent/JP2007116161A/ja active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20050029224A1 (en) * | 2001-04-13 | 2005-02-10 | Bernard Aspar | Detachable substrate or detachable structure and method for the production thereof |
US20050026426A1 (en) * | 2003-07-29 | 2005-02-03 | Christophe Maleville | Method for producing a high quality useful layer on a substrate |
US20050196937A1 (en) * | 2004-03-05 | 2005-09-08 | Nicolas Daval | Methods for forming a semiconductor structure |
Also Published As
Publication number | Publication date |
---|---|
KR20070042457A (ko) | 2007-04-23 |
EP1777735A2 (fr) | 2007-04-25 |
JP2007116161A (ja) | 2007-05-10 |
EP1777735A3 (fr) | 2009-08-19 |
KR100840428B1 (ko) | 2008-06-20 |
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