SG11202008425RA - Self-selecting memory array with horizontal access lines - Google Patents

Self-selecting memory array with horizontal access lines

Info

Publication number
SG11202008425RA
SG11202008425RA SG11202008425RA SG11202008425RA SG11202008425RA SG 11202008425R A SG11202008425R A SG 11202008425RA SG 11202008425R A SG11202008425R A SG 11202008425RA SG 11202008425R A SG11202008425R A SG 11202008425RA SG 11202008425R A SG11202008425R A SG 11202008425RA
Authority
SG
Singapore
Prior art keywords
self
memory array
access lines
selecting memory
horizontal access
Prior art date
Application number
SG11202008425RA
Inventor
Lorenzo Fratin
Fabio Pellizzer
Agostino Pirovano
Russell Meyer
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Publication of SG11202008425RA publication Critical patent/SG11202008425RA/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/003—Cell access
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
    • H10B53/30—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0007—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising metal oxide memory material, e.g. perovskites
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0023—Address circuits or decoders
    • G11C13/0026—Bit-line or column circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/38—Digital stores in which the information is moved stepwise, e.g. shift registers two-dimensional, e.g. horizontal and vertical shift registers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528—Geometry or layout of the interconnection structure
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
    • H10B53/20—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the three-dimensional arrangements, e.g. with cells on different height levels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
    • H10B53/40—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the peripheral circuit region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
    • H10B53/50—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the boundary region between the core and peripheral circuit regions
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/71—Three dimensional array
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/73—Array where access device function, e.g. diode function, being merged with memorizing function of memory element
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/77—Array wherein the memory element being directly connected to the bit lines and word lines without any access device being used

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Geometry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Semiconductor Memories (AREA)
SG11202008425RA 2018-03-19 2019-02-22 Self-selecting memory array with horizontal access lines SG11202008425RA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US15/925,536 US10593399B2 (en) 2018-03-19 2018-03-19 Self-selecting memory array with horizontal bit lines
PCT/US2019/019126 WO2019182722A1 (en) 2018-03-19 2019-02-22 Self-selecting memory array with horizontal access lines

Publications (1)

Publication Number Publication Date
SG11202008425RA true SG11202008425RA (en) 2020-10-29

Family

ID=67904153

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11202008425RA SG11202008425RA (en) 2018-03-19 2019-02-22 Self-selecting memory array with horizontal access lines

Country Status (8)

Country Link
US (3) US10593399B2 (en)
EP (1) EP3769337A4 (en)
JP (1) JP7230051B2 (en)
KR (1) KR102532103B1 (en)
CN (2) CN115376571A (en)
SG (1) SG11202008425RA (en)
TW (1) TWI694591B (en)
WO (1) WO2019182722A1 (en)

Families Citing this family (13)

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US11355554B2 (en) 2020-05-08 2022-06-07 Micron Technology, Inc. Sense lines in three-dimensional memory arrays, and methods of forming the same
DE102020123746B4 (en) * 2020-05-29 2023-02-16 Taiwan Semiconductor Manufacturing Co., Ltd. Three-dimensional non-volatile memory device and method of making same
US11532640B2 (en) 2020-05-29 2022-12-20 Taiwan Semiconductor Manufacturing Co., Ltd. Method for manufacturing a three-dimensional memory
US11404091B2 (en) 2020-06-19 2022-08-02 Taiwan Semiconductor Manufacturing Co., Ltd. Memory array word line routing
US11552103B2 (en) * 2020-06-26 2023-01-10 Taiwan Semiconductor Manufacturing Company, Ltd. Three-dimensional stackable ferroelectric random access memory devices and methods of forming
US11647634B2 (en) 2020-07-16 2023-05-09 Taiwan Semiconductor Manufacturing Co., Ltd. Three-dimensional memory device and method
US11355516B2 (en) 2020-07-16 2022-06-07 Taiwan Semiconductor Manufacturing Co., Ltd. Three-dimensional memory device and method
US11423966B2 (en) 2020-07-30 2022-08-23 Taiwan Semiconductor Manufacturing Co., Ltd. Memory array staircase structure
US11957068B2 (en) 2021-05-27 2024-04-09 Micron Technology, Inc. Memory cells with sidewall and bulk regions in vertical structures
US11864475B2 (en) 2021-05-27 2024-01-02 Micron Technology, Inc. Memory device with laterally formed memory cells
US11903333B2 (en) * 2021-05-27 2024-02-13 Micron Technology, Inc. Sidewall structures for memory cells in vertical structures
US11825754B2 (en) 2021-05-27 2023-11-21 Micron Technology, Inc. Memory cells with sidewall and bulk regions in planar structures
KR20230174475A (en) * 2022-06-21 2023-12-28 삼성전자주식회사 3d ferroelectric memory devices

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US8710484B2 (en) 2010-02-23 2014-04-29 Panasonic Corporation Method for manufacturing non-volatile memory device, non-volatile memory element, and non-volatile memory device
KR101741069B1 (en) * 2010-06-11 2017-05-30 삼성전자 주식회사 Fabrication method of nonvolatile memory device
JP2012033828A (en) * 2010-08-02 2012-02-16 Toshiba Corp Semiconductor storage device and manufacturing method of the same
US8824183B2 (en) * 2010-12-14 2014-09-02 Sandisk 3D Llc Non-volatile memory having 3D array of read/write elements with vertical bit lines and select devices and methods thereof
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Also Published As

Publication number Publication date
KR20200119346A (en) 2020-10-19
US20190287614A1 (en) 2019-09-19
US20230005535A1 (en) 2023-01-05
JP2021517361A (en) 2021-07-15
CN111868927A (en) 2020-10-30
CN111868927B (en) 2022-08-09
TWI694591B (en) 2020-05-21
JP7230051B2 (en) 2023-02-28
KR102532103B1 (en) 2023-05-15
US20200243134A1 (en) 2020-07-30
US11404117B2 (en) 2022-08-02
EP3769337A4 (en) 2021-10-27
CN115376571A (en) 2022-11-22
EP3769337A1 (en) 2021-01-27
TW201946253A (en) 2019-12-01
WO2019182722A1 (en) 2019-09-26
US10593399B2 (en) 2020-03-17

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