SG11202005174PA - Multi-level self-selecting memory device - Google Patents

Multi-level self-selecting memory device

Info

Publication number
SG11202005174PA
SG11202005174PA SG11202005174PA SG11202005174PA SG11202005174PA SG 11202005174P A SG11202005174P A SG 11202005174PA SG 11202005174P A SG11202005174P A SG 11202005174PA SG 11202005174P A SG11202005174P A SG 11202005174PA SG 11202005174P A SG11202005174P A SG 11202005174PA
Authority
SG
Singapore
Prior art keywords
memory device
selecting memory
level self
self
level
Prior art date
Application number
SG11202005174PA
Inventor
Andrea Redaelli
Innocenzo Tortorelli
Agostino Pirovano
Fabio Pellizzer
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Publication of SG11202005174PA publication Critical patent/SG11202005174PA/en

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5678Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using amorphous/crystalline phase transition storage elements
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0004Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising amorphous/crystalline phase transition cells
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/004Reading or sensing circuits or methods
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/0069Writing or programming circuits or methods
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20Multistable switching devices, e.g. memristors
    • H10N70/24Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801Constructional details of multistable switching devices
    • H10N70/821Device geometry
    • H10N70/826Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801Constructional details of multistable switching devices
    • H10N70/881Switching materials
    • H10N70/882Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801Constructional details of multistable switching devices
    • H10N70/881Switching materials
    • H10N70/882Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
    • H10N70/8825Selenides, e.g. GeSe
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0007Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising metal oxide memory material, e.g. perovskites
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/004Reading or sensing circuits or methods
    • G11C2013/0052Read process characterized by the shape, e.g. form, length, amplitude of the read pulse
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/0069Writing or programming circuits or methods
    • G11C2013/0073Write using bi-directional cell biasing
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/0069Writing or programming circuits or methods
    • G11C2013/0092Write characterized by the shape, e.g. form, length, amplitude of the write pulse
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2213/00Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/30Resistive cell, memory material aspects
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2213/00Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/30Resistive cell, memory material aspects
    • G11C2213/31Material having complex metal oxide, e.g. perovskite structure
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2213/00Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70Resistive array aspects
    • G11C2213/71Three dimensional array

Landscapes

  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
SG11202005174PA 2017-12-14 2018-11-30 Multi-level self-selecting memory device SG11202005174PA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US15/842,496 US10546632B2 (en) 2017-12-14 2017-12-14 Multi-level self-selecting memory device
PCT/US2018/063309 WO2019118207A1 (en) 2017-12-14 2018-11-30 Multi-level self-selecting memory device

Publications (1)

Publication Number Publication Date
SG11202005174PA true SG11202005174PA (en) 2020-07-29

Family

ID=66815171

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11202005174PA SG11202005174PA (en) 2017-12-14 2018-11-30 Multi-level self-selecting memory device

Country Status (8)

Country Link
US (3) US10546632B2 (en)
EP (1) EP3724879B1 (en)
JP (2) JP6972351B2 (en)
KR (2) KR20200086379A (en)
CN (1) CN111465987B (en)
SG (1) SG11202005174PA (en)
TW (1) TWI681397B (en)
WO (1) WO2019118207A1 (en)

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TWI760924B (en) * 2019-12-03 2022-04-11 美商美光科技公司 Methods and systems for accessing memory cells
JP2021149991A (en) * 2020-03-19 2021-09-27 キオクシア株式会社 Memory system and method
US11043277B1 (en) 2020-05-07 2021-06-22 Micron Technology, Inc. Two multi-level memory cells sensed to determine multiple data values
US11133062B1 (en) * 2020-05-07 2021-09-28 Micron Technology, Inc. Two memory cells sensed to determine one data value
US11295822B2 (en) 2020-08-14 2022-04-05 Micron Technology, Inc. Multi-state programming of memory cells
US11217308B1 (en) * 2020-08-14 2022-01-04 Micron Technology Programming memory cells using asymmetric current pulses
US11238945B1 (en) * 2020-08-28 2022-02-01 Micron Technology, Inc. Techniques for programming self-selecting memory
US11605418B2 (en) * 2020-10-26 2023-03-14 Micron Technology, Inc. Memory device architecture using multiple physical cells per bit to improve read margin and to alleviate the need for managing demarcation read voltages
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US11903333B2 (en) * 2021-05-27 2024-02-13 Micron Technology, Inc. Sidewall structures for memory cells in vertical structures
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US11769566B2 (en) * 2021-07-02 2023-09-26 Micron Technology, Inc. Programming codewords for error correction operations to memory
CN113687872B (en) * 2021-07-19 2024-03-29 三六零数字安全科技集团有限公司 Selection component control method, device, storage medium and apparatus
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Also Published As

Publication number Publication date
CN111465987B (en) 2023-09-26
TWI681397B (en) 2020-01-01
TW201933365A (en) 2019-08-16
US11094377B2 (en) 2021-08-17
JP2022028706A (en) 2022-02-16
CN111465987A (en) 2020-07-28
US11769551B2 (en) 2023-09-26
WO2019118207A1 (en) 2019-06-20
EP3724879A1 (en) 2020-10-21
US20220036946A1 (en) 2022-02-03
US20200118621A1 (en) 2020-04-16
KR20200086379A (en) 2020-07-16
US20190189203A1 (en) 2019-06-20
JP6972351B2 (en) 2021-11-24
US10546632B2 (en) 2020-01-28
EP3724879B1 (en) 2024-01-03
JP2021507442A (en) 2021-02-22
JP7197664B2 (en) 2022-12-27
KR20220167339A (en) 2022-12-20
EP3724879A4 (en) 2021-08-18

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