SG11201901210UA - Ferroelectric memory cells - Google Patents

Ferroelectric memory cells

Info

Publication number
SG11201901210UA
SG11201901210UA SG11201901210UA SG11201901210UA SG11201901210UA SG 11201901210U A SG11201901210U A SG 11201901210UA SG 11201901210U A SG11201901210U A SG 11201901210UA SG 11201901210U A SG11201901210U A SG 11201901210UA SG 11201901210U A SG11201901210U A SG 11201901210UA
Authority
SG
Singapore
Prior art keywords
international
ferroelectric memory
boise
idaho
capacitors
Prior art date
Application number
SG11201901210UA
Inventor
Scott J Derner
Christopher J Kawamura
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Publication of SG11201901210UA publication Critical patent/SG11201901210UA/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
    • G11C11/221—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements using ferroelectric capacitors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
    • G11C11/225—Auxiliary circuits
    • G11C11/2253—Address circuits or decoders
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
    • G11C11/225—Auxiliary circuits
    • G11C11/2259—Cell access
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
    • G11C11/225—Auxiliary circuits
    • G11C11/2273—Reading or sensing circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
    • G11C11/225—Auxiliary circuits
    • G11C11/2275—Writing or programming circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
    • G11C11/225—Auxiliary circuits
    • G11C11/2293—Timing circuits or methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/55—Capacitors with a dielectric comprising a perovskite structure material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
    • H01L28/90—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
    • H10B53/20—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the three-dimensional arrangements, e.g. with cells on different height levels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
    • H10B53/30—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
    • G11C11/225—Auxiliary circuits
    • G11C11/2253—Address circuits or decoders
    • G11C11/2257—Word-line or row circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Dram (AREA)

Abstract

INTERNATIONAL APPLICATION PUBLISHED UNDER THE PATENT COOPERATION TREATY (PCT) (19) World Intellectual Property 111111411 0 11101 HOE 3E1 0 011101 111011101111111111011110111011# Organization International Bureau (10) International Publication Number (43) International Publication Date .....0\"\" WO 2018/044485 Al 08 March 2018 (08.03.2018) WIP0 I PCT (51) International Patent Classification: KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, Gl1C 11/22 (2006.01) H01L 27/11507 (2017.01) MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, (21) International Application Number: OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, PCT/US2017/045167 SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW. (22) International Filing Date: (84) Designated States (unless otherwise indicated, for every 02 August 2017 (02.08.2017) kind of regional protection available): ARIPO (BW, GH, (25) Filing Language: English GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, (26) Publication Language: English UG, TM), ZM, ZW), Eurasian (AM, AZ, BY, KG, KZ, RU, TJ, European (AL, AT, BE, BG, CH, CY, CZ, DE, DK, (30) Priority Data: EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, 62/381,942 31 August 2016 (31.08.2016) US MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR), OAPI (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, (71) Applicant: MICRON TECHNOLOGY, INC. [US/US]; KM, ML, MR, NE, SN, TD, TG). 8000 South Federal Way, Boise, Idaho 83716 (US). (72) Inventors: DERNER, Scott J.; 5032 E. Sagewood Drive, Published: Boise, Idaho 83716 (US). KAWAMURA, Christopher J.; — with international search report (Art. 21(3)) 1778 S. Toluka Way, Boise, Idaho 83712 (US). (74) Agent: ENG, Kimton et al.; Dorsey & Whitney LLP, 701 5th Ave, Suite 6100, Seattle, Washington 98104 (US). Designated States (unless otherwise indicated, for every = (81) kind of national protection available): AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, =_ CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, = (54) Title: FERROELECTRIC MEMORY CELLS = (57) : Apparatuses and methods are disclosed that include ferro- 0-10 electric memory cells. An example ferroelectric memory cell includes two transistors and two capacitors. Another example ferroelectric memory cell SA includes three transistors and two capacitors. Another example ferroelec- = _ = tric memory cell includes four transistors and two capacitors. = = MC(0) 105 = = M 1 105 1-1 • WIN ir) MCA) . GC 71' /05 71' 71' 0 --.... CP 00 1-1 © el FIG, 2A 0
SG11201901210UA 2016-08-31 2017-08-02 Ferroelectric memory cells SG11201901210UA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201662381942P 2016-08-31 2016-08-31
PCT/US2017/045167 WO2018044485A1 (en) 2016-08-31 2017-08-02 Ferroelectric memory cells

Publications (1)

Publication Number Publication Date
SG11201901210UA true SG11201901210UA (en) 2019-03-28

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
SG11201901210UA SG11201901210UA (en) 2016-08-31 2017-08-02 Ferroelectric memory cells

Country Status (8)

Country Link
US (4) US10153018B2 (en)
EP (1) EP3507804A4 (en)
JP (1) JP6980006B2 (en)
KR (2) KR102227270B1 (en)
CN (1) CN109791784A (en)
SG (1) SG11201901210UA (en)
TW (2) TWI716011B (en)
WO (1) WO2018044485A1 (en)

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