SG11201810415PA - Structure for radiofrequency applications - Google Patents

Structure for radiofrequency applications

Info

Publication number
SG11201810415PA
SG11201810415PA SG11201810415PA SG11201810415PA SG11201810415PA SG 11201810415P A SG11201810415P A SG 11201810415PA SG 11201810415P A SG11201810415P A SG 11201810415PA SG 11201810415P A SG11201810415P A SG 11201810415PA SG 11201810415P A SG11201810415P A SG 11201810415PA
Authority
SG
Singapore
Prior art keywords
substrate
radiofrequency
support substrate
zones
zone
Prior art date
Application number
SG11201810415PA
Other languages
English (en)
Inventor
Eric Desbonnets
Ionut Radu
Oleg Kononchuk
Jean-Pierre Raskin
Original Assignee
Soitec Silicon On Insulator
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec Silicon On Insulator filed Critical Soitec Silicon On Insulator
Publication of SG11201810415PA publication Critical patent/SG11201810415PA/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76283Lateral isolation by refilling of trenches with dielectric material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1203Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1218Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0642Isolation within the component, i.e. internal isolation
    • H01L29/0649Dielectric regions, e.g. SiO2 regions, air gaps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78603Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the insulating substrate or support

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Micromachines (AREA)
  • Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
  • Element Separation (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
SG11201810415PA 2016-06-08 2017-06-06 Structure for radiofrequency applications SG11201810415PA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1655266A FR3052592B1 (fr) 2016-06-08 2016-06-08 Structure pour applications radiofrequences
PCT/FR2017/051418 WO2017212160A1 (fr) 2016-06-08 2017-06-06 Structure pour applications radiofrequences

Publications (1)

Publication Number Publication Date
SG11201810415PA true SG11201810415PA (en) 2018-12-28

Family

ID=56511794

Family Applications (2)

Application Number Title Priority Date Filing Date
SG10201913097SA SG10201913097SA (en) 2016-06-08 2017-06-06 Structure for radiofrequency applications
SG11201810415PA SG11201810415PA (en) 2016-06-08 2017-06-06 Structure for radiofrequency applications

Family Applications Before (1)

Application Number Title Priority Date Filing Date
SG10201913097SA SG10201913097SA (en) 2016-06-08 2017-06-06 Structure for radiofrequency applications

Country Status (8)

Country Link
US (3) US10943815B2 (ko)
EP (1) EP3469627B1 (ko)
JP (1) JP7053502B2 (ko)
KR (1) KR102369549B1 (ko)
FR (1) FR3052592B1 (ko)
SG (2) SG10201913097SA (ko)
TW (1) TWI733831B (ko)
WO (1) WO2017212160A1 (ko)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3052592B1 (fr) * 2016-06-08 2018-05-18 Soitec Structure pour applications radiofrequences
FR3062517B1 (fr) * 2017-02-02 2019-03-15 Soitec Structure pour application radiofrequence
CN110828962B (zh) 2018-08-09 2021-08-03 财团法人工业技术研究院 天线阵列模块及其制造方法
US10658474B2 (en) * 2018-08-14 2020-05-19 Taiwan Semiconductor Manufacturing Co., Ltd. Method for forming thin semiconductor-on-insulator (SOI) substrates
FR3086096B1 (fr) * 2018-09-14 2021-08-27 Soitec Silicon On Insulator Procede de realisation d'un substrat avance pour une integration hybride
US11661337B2 (en) * 2020-10-19 2023-05-30 Taiwan Semiconductor Manufacturing Company, Ltd. Comb electrode release process for MEMS structure
US11658206B2 (en) * 2020-11-13 2023-05-23 Taiwan Semiconductor Manufacturing Company, Ltd. Deep trench structure for a capacitive device
US20220406649A1 (en) * 2021-06-22 2022-12-22 Texas Instruments Incorporated Passive component q factor enhancement with elevated resistance region of substrate
FR3126541A1 (fr) 2021-09-02 2023-03-03 Commissariat A L'energie Atomique Et Aux Energies Alternatives Procédé de fabrication d’une structure multicouche
FR3134478A1 (fr) * 2022-04-06 2023-10-13 Commissariat A L'energie Atomique Et Aux Energies Alternatives Substrat comprenant des vias et procédés de fabrication associés
FR3142289A1 (fr) * 2022-11-23 2024-05-24 Commissariat A L'energie Atomique Et Aux Energies Alternatives Procédé de fabrication d’un empilement comprenant une couche isolante

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JP3582890B2 (ja) * 1995-05-23 2004-10-27 株式会社日立製作所 半導体装置
US6312568B2 (en) * 1999-12-07 2001-11-06 Applied Materials, Inc. Two-step AIN-PVD for improved film properties
KR100388011B1 (ko) * 2000-01-17 2003-06-18 삼성전기주식회사 GaN박막 SAW필터 및 이를 제조하는 방법
US6391792B1 (en) * 2000-05-18 2002-05-21 Taiwan Semiconductor Manufacturing Co., Ltd Multi-step chemical mechanical polish (CMP) planarizing method for forming patterned planarized aperture fill layer
CN101960223A (zh) * 2007-12-29 2011-01-26 圣戈本陶瓷及塑料股份有限公司 同轴的陶瓷点火器及其制造方法
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CN102169552A (zh) 2011-01-28 2011-08-31 上海集成电路研发中心有限公司 射频识别标签及其制造方法
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Also Published As

Publication number Publication date
US20210143053A1 (en) 2021-05-13
EP3469627A1 (fr) 2019-04-17
WO2017212160A1 (fr) 2017-12-14
FR3052592A1 (fr) 2017-12-15
TWI733831B (zh) 2021-07-21
JP2019527925A (ja) 2019-10-03
FR3052592B1 (fr) 2018-05-18
US20220277988A1 (en) 2022-09-01
US20190157137A1 (en) 2019-05-23
JP7053502B2 (ja) 2022-04-12
KR20190017762A (ko) 2019-02-20
TW201806175A (zh) 2018-02-16
EP3469627B1 (fr) 2020-07-29
SG10201913097SA (en) 2020-02-27
US10943815B2 (en) 2021-03-09
US11367650B2 (en) 2022-06-21
KR102369549B1 (ko) 2022-03-04
US11923239B2 (en) 2024-03-05

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