SG11201809861XA - Method for fabricating a strained semiconductor-on-insulator substrate - Google Patents

Abstract

INTERNATIONAL APPLICATION PUBLISHED UNDER THE PATENT COOPERATION TREATY (PCT) (19) World Intellectual Property :::` , Organization 03 111111111111111111111111111111111111111111111111111111111111111111111111111111 International Bureau (10) International Publication Number (43) International Publication Date ......°' WO 2017/198687 Al 23 November 2017 (23.11.2017) WIPO I PCT (51) International Patent Classification: LE TOUVET (FR). DAVAL, Nicolas; Fontcouvert, 38570 HO1L 21/762 (2006.01) GONCELIN (FR). (21) International Application Number: (74) Agent: REGIMBEAU; 139 Rue Vendome, 69477 LYON PCT/EP2017/061793 CEDEX 06 (FR). (22) International Filing Date: (81) Designated States (unless otherwise indicated, for every 17 May 2017 (17.05.2017) kind of national protection available): AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, (25) Filing Language: English CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, (26) Publication Language: English DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KH, KN, KP, KR, (30) Priority Data: KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, 1654369 17 May 2016 (17.05.2016) FR MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, (71) Applicant: SOITEC [FR/FR]; Parc Technologique des PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, Fontaines, Chemin des Franques, 38190 BERNIN (FR). SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW. (72) Inventors: SCHWARZENBACH, Walter; 19, Chemin du Mollard, 38330 SAINT NAZAIRE LES EYMES (FR). (84) Designated States (unless otherwise indicated, for every CHABANNE, Guillaume; 34 Rue des Gaillardes, 38660 kind of regional protection available): ARIPO (BW, GH, (54) Title: METHOD FOR FABRICATING A STRAINED SEMICONDUCTOR-ON-INSULATOR SUBSTRATE = (57) : The invention relates to a method for fabricating a strained sSOI T =semiconductor-on-insulator substrate, comprising: (a) the provision of a 12 donor substrate (1) comprising a monocrystalline semiconductor layer (12); (b) the provision of a receiving substrate (2) comprising a surface 13 layer (20) of a strained monocrystalline semiconductor material; (c) the / / z zoo. MY A — = bonding donor dielec- 20 of the substrate (1) to the receiving substrate (2), a tric layer (13, 22) being at the interface; (d) the transfer of the monocrys- - 2 — = portion talline semiconductor layer (12) from the donor substrate to the receiv- ing substrate; (e) the cutting, by means of trench isolations (T) extending into the receiving substrate (2) beyond the strained semiconductor ma- terial layer (20), of a from a stack formed from the transferred monocrystalline semiconductor layer, from the dielectric layer and from = _ the strained semiconductor material layer, said cutting operation result- FIGURE 'IF ing in the relaxation of the strain in the strained semiconductor material, = = and in the application of at least a part of said strain to the transferred monocrystalline semiconductor layer. The donor substrate (1) compris- = es a monocrystalline carrier substrate (10), an intermediate layer (11) = and said monocrystalline semiconductor layer (12), the intermediate layer =_ (11) forming an etch-stop layer with respect to the carrier substrate mate- rial (10) and to the material of the monocrystalline semiconductor layer (12), step (d) comprising the transfer of the monocrystalline semiconduc- tor layer (12), of the intermediate layer (11) and of a portion (15) of the carrier substrate (10). Between steps (d) and (e), a first operation of — se- lectively etching said portion (15) of the carrier substrate with respect to 1-1 said intermediate layer (11) and a second operation of selectively etching said intermediate layer (11) with respect to the monocrystalline semicon- IN ductor layer (12) are implemented. GC GC 0\ 1-1 --.... IN 1-1 0 ei C [Continued on next page] WO 2017/198687 Al MIDEDIM011010EIROIDEM0MOHHE1H1111111111111111111111111111 GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW), Eurasian (AM, AZ, BY, KG, KZ, RU, TJ, TM), European (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR), OAPI (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG). Declarations under Rule 4.17: — of inventorship (Rule 4.17(iv)) Published: — with international search report (Art. 21(3))