SG11201805152UA - Superconducting bump bonds - Google Patents

Superconducting bump bonds

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Publication number
SG11201805152UA
SG11201805152UA SG11201805152UA SG11201805152UA SG11201805152UA SG 11201805152U A SG11201805152U A SG 11201805152UA SG 11201805152U A SG11201805152U A SG 11201805152UA SG 11201805152U A SG11201805152U A SG 11201805152UA SG 11201805152U A SG11201805152U A SG 11201805152UA
Authority
SG
Singapore
Prior art keywords
international
chip
circuit
google
pct
Prior art date
Application number
SG11201805152UA
Inventor
Joshua Yousouf Mutus
Erik Anthony Lucero
Original Assignee
Google Llc
Joshua Yousouf Mutus
Erik Anthony Lucero
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to US201562267824P priority Critical
Application filed by Google Llc, Joshua Yousouf Mutus, Erik Anthony Lucero filed Critical Google Llc
Priority to PCT/US2015/068082 priority patent/WO2017105524A1/en
Publication of SG11201805152UA publication Critical patent/SG11201805152UA/en

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Abstract

liIN ill IS h. le Mr :WI -.....\" A 883 / 1 1 '6 111 61 4 • • • 111211811EN tf1151151111 V' AM r r , (12) INTERNATIONAL APPLICATION PUBLISHED UNDER THE PATENT COOPERATION TREATY (PCT) (19) World Intellectual Property Organization International Bureau (10) International Publication Number (43) International Publication Date WO 2017/105524 Al 22 June 2017 (22.06.2017) WIPO I PCT 111111111111110111011111111111010111110 III 0101111111111111110101111111111111110111111 (51) International Patent Classification: HOlL 27/18 (2006.01) HOlL 23/498 (2006.01) (21) International Application Number: PCT/US2015/068082 (22) International Filing Date: 30 December 2015 (30.12.2015) (25) Filing Language: English (26) Publication Language: English (30) Priority Data: 62/267,824 15 December 2015 (15.12.2015) US (71) Applicant: GOOGLE INC. [US/US]; 1600 Amphitheatre Parkway, Mountain View, California 94043 (US). (72) Inventors; and (71) Applicants : MUTUS, Joshua Yousouf [US/US]; Google Inc., 1600 Amphitheatre Parkway, Mountain View, Cali- TJ, TM), European (AL, AT, BE, BG, CH, CY, CZ, DE, fornia 94043 (US). LUCERO, Erik Anthony [US/US]; Google Inc., 1600 Amphitheatre Parkway, Moutain View, California 94043 (US). (74) Agent: VALENTINO, Joseph; Fish & Richardson P.C., P.O. Box 1022, Minneapolis, Minnesota 55440-1022 (US). (81) Designated States (unless otherwise indicated, for every kind of national protection available): AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW. (84) Designated States (unless otherwise indicated, for every kind of regional protection available): ARIPO (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW), Eurasian (AM, AZ, BY, KG, KZ, RU, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, [Continued on next page] (54) Title: SUPERCONDUCTING BUMP BONDS 100 108 108 108 110 (57) : A device (100) includes a first chip (104) having a first circuit ele- ment (112), a first interconnect pad (116) in electrical contact (118) with the first circuit element, and a barrier layer (120) on the first interconnect pad, a supercon- ducting bump bond (106) on the barrier layer, and a second chip (102) joined to the first chip by the superconducting bump bond, the second chip having a quantum circuit element (108), in which the superconducting bump bond provides an electrical connection between the first circuit element and the quantum circuit element. 102 118 116 120 106 104 120 116 118 118 116 120 106 120 116 18 W O 20 17 / 1055 24 Al 112 112 FIG. 1 WO 2017/105524 Al MIDEDIM000101011101010MOIDIREM1111101011111111011110111111 SM, TR), OAPI (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, Published: GW, KM, ML, MR, NE, SN, TD, TG). — with international search report (Art. 21(3))
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US10748961B2 (en) * 2016-07-01 2020-08-18 Intel Corporation Interconnects below qubit plane by substrate bonding
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