SG11201701661UA - Method for processing semiconductor wafer, method for manufacturing bonded wafer, and method for manufacturing epitaxial wafer - Google Patents

Method for processing semiconductor wafer, method for manufacturing bonded wafer, and method for manufacturing epitaxial wafer

Info

Publication number
SG11201701661UA
SG11201701661UA SG11201701661UA SG11201701661UA SG11201701661UA SG 11201701661U A SG11201701661U A SG 11201701661UA SG 11201701661U A SG11201701661U A SG 11201701661UA SG 11201701661U A SG11201701661U A SG 11201701661UA SG 11201701661U A SG11201701661U A SG 11201701661UA
Authority
SG
Singapore
Prior art keywords
wafer
manufacturing
processing semiconductor
semiconductor wafer
bonded
Prior art date
Application number
SG11201701661UA
Inventor
Yuki Miyazawa
Takahiro Kida
Tomofumi Takano
Original Assignee
Shinetsu Handotai Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinetsu Handotai Kk filed Critical Shinetsu Handotai Kk
Publication of SG11201701661UA publication Critical patent/SG11201701661UA/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • H01L21/02005Preparing bulk and homogeneous wafers
    • H01L21/02008Multistep processes
    • H01L21/0201Specific process step
    • H01L21/02024Mirror polishing
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B24GRINDING; POLISHING
    • B24BMACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B21/00Machines or devices using grinding or polishing belts; Accessories therefor
    • B24B21/04Machines or devices using grinding or polishing belts; Accessories therefor for grinding plane surfaces
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B24GRINDING; POLISHING
    • B24BMACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B49/00Measuring or gauging equipment for controlling the feed movement of the grinding tool or work; Arrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation
    • B24B49/02Measuring or gauging equipment for controlling the feed movement of the grinding tool or work; Arrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation according to the instantaneous size and required size of the workpiece acted upon, the measuring or gauging being continuous or intermittent
    • B24B49/04Measuring or gauging equipment for controlling the feed movement of the grinding tool or work; Arrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation according to the instantaneous size and required size of the workpiece acted upon, the measuring or gauging being continuous or intermittent involving measurement of the workpiece at the place of grinding during grinding operation
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B24GRINDING; POLISHING
    • B24BMACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B9/00Machines or devices designed for grinding edges or bevels on work or for removing burrs; Accessories therefor
    • B24B9/02Machines or devices designed for grinding edges or bevels on work or for removing burrs; Accessories therefor characterised by a special design with respect to properties of materials specific to articles to be ground
    • B24B9/06Machines or devices designed for grinding edges or bevels on work or for removing burrs; Accessories therefor characterised by a special design with respect to properties of materials specific to articles to be ground of non-metallic inorganic material, e.g. stone, ceramics, porcelain
    • B24B9/065Machines or devices designed for grinding edges or bevels on work or for removing burrs; Accessories therefor characterised by a special design with respect to properties of materials specific to articles to be ground of non-metallic inorganic material, e.g. stone, ceramics, porcelain of thin, brittle parts, e.g. semiconductors, wafers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67092Apparatus for mechanical treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • H01L22/26Acting in response to an ongoing measurement without interruption of processing, e.g. endpoint detection, in-situ thickness measurement
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/02428Structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
SG11201701661UA 2014-09-11 2015-08-19 Method for processing semiconductor wafer, method for manufacturing bonded wafer, and method for manufacturing epitaxial wafer SG11201701661UA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2014185325A JP6045542B2 (en) 2014-09-11 2014-09-11 Semiconductor wafer processing method, bonded wafer manufacturing method, and epitaxial wafer manufacturing method
PCT/JP2015/004130 WO2016038800A1 (en) 2014-09-11 2015-08-19 Method for processing semiconductor wafer, method for manufacturing bonded wafer, and method for manufacturing epitaxial wafer

Publications (1)

Publication Number Publication Date
SG11201701661UA true SG11201701661UA (en) 2017-04-27

Family

ID=55458575

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11201701661UA SG11201701661UA (en) 2014-09-11 2015-08-19 Method for processing semiconductor wafer, method for manufacturing bonded wafer, and method for manufacturing epitaxial wafer

Country Status (8)

Country Link
US (1) US9905411B2 (en)
EP (1) EP3193357B1 (en)
JP (1) JP6045542B2 (en)
KR (1) KR102088279B1 (en)
CN (1) CN106663623B (en)
SG (1) SG11201701661UA (en)
TW (1) TWI595548B (en)
WO (1) WO2016038800A1 (en)

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JP6614076B2 (en) * 2016-09-07 2019-12-04 信越半導体株式会社 Method for evaluating surface defects of substrates for bonding
DE102017210423A1 (en) * 2017-06-21 2018-12-27 Siltronic Ag Method, control system and plant for processing a semiconductor wafer and semiconductor wafer
JP6750592B2 (en) * 2017-08-15 2020-09-02 信越半導体株式会社 Method and apparatus for evaluating edge shape of silicon wafer, silicon wafer, and method for selecting and manufacturing the same
US10732128B2 (en) * 2017-10-26 2020-08-04 Camtek Ltd. Hierarchical wafer inspection
EP3567139B1 (en) 2018-05-11 2021-04-07 SiCrystal GmbH Chamfered silicon carbide substrate and method of chamfering
EP3567138B1 (en) 2018-05-11 2020-03-25 SiCrystal GmbH Chamfered silicon carbide substrate and method of chamfering
CN112218737B (en) * 2018-09-14 2023-06-06 胜高股份有限公司 Mirror chamfering method for wafer, manufacturing method for wafer, and wafer
JP7084845B2 (en) * 2018-10-25 2022-06-15 株式会社ディスコ Wafer manufacturing method
CN111430223B (en) * 2020-05-15 2023-06-23 中国科学院微电子研究所 Pre-cleaning device
CN111451909B (en) * 2020-05-18 2021-06-11 立铠精密科技(盐城)有限公司 Integrated plate edge grinding processing system for computer system
CN111761419B (en) * 2020-06-11 2021-10-15 上海中欣晶圆半导体科技有限公司 Adhesive tape grinding process for repairing edge damage of wafer

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JP4846915B2 (en) * 2000-03-29 2011-12-28 信越半導体株式会社 Manufacturing method of bonded wafer
US6722964B2 (en) * 2000-04-04 2004-04-20 Ebara Corporation Polishing apparatus and method
DE10142400B4 (en) * 2001-08-30 2009-09-03 Siltronic Ag Improved local flatness semiconductor wafer and method of making the same
JP4162892B2 (en) * 2002-01-11 2008-10-08 日鉱金属株式会社 Semiconductor wafer and manufacturing method thereof
JP4093793B2 (en) * 2002-04-30 2008-06-04 信越半導体株式会社 Semiconductor wafer manufacturing method and wafer
JP3534115B1 (en) * 2003-04-02 2004-06-07 住友電気工業株式会社 Edge-polished nitride semiconductor substrate, edge-polished GaN free-standing substrate, and edge processing method for nitride semiconductor substrate
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JP4815801B2 (en) * 2004-12-28 2011-11-16 信越半導体株式会社 Silicon wafer polishing method and manufacturing method, disk-shaped workpiece polishing apparatus, and silicon wafer
JP2006237055A (en) * 2005-02-22 2006-09-07 Shin Etsu Handotai Co Ltd Method of manufacturing semiconductor wafer and method of specularly chamfering semiconductor wafer
CN101877305B (en) * 2005-04-19 2012-01-11 株式会社荏原制作所 Substrate processing apparatus
JP4742845B2 (en) * 2005-12-15 2011-08-10 信越半導体株式会社 Method for processing chamfered portion of semiconductor wafer and method for correcting groove shape of grindstone
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JP5274993B2 (en) * 2007-12-03 2013-08-28 株式会社荏原製作所 Polishing equipment
JP2010021394A (en) * 2008-07-11 2010-01-28 Sumco Corp Method of manufacturing semiconductor wafer
EP2192609A1 (en) * 2008-11-28 2010-06-02 SUMCO Corporation Method of producing wafer for active layer
JP5352331B2 (en) * 2009-04-15 2013-11-27 ダイトエレクトロン株式会社 Wafer chamfering method
US8952496B2 (en) * 2009-12-24 2015-02-10 Sumco Corporation Semiconductor wafer and method of producing same
JP5521582B2 (en) * 2010-01-28 2014-06-18 信越半導体株式会社 Manufacturing method of bonded wafer
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Also Published As

Publication number Publication date
JP6045542B2 (en) 2016-12-14
EP3193357B1 (en) 2019-05-01
TW201611112A (en) 2016-03-16
CN106663623A (en) 2017-05-10
WO2016038800A1 (en) 2016-03-17
TWI595548B (en) 2017-08-11
KR20170051442A (en) 2017-05-11
EP3193357A4 (en) 2018-08-01
US9905411B2 (en) 2018-02-27
US20170301533A1 (en) 2017-10-19
JP2016058623A (en) 2016-04-21
CN106663623B (en) 2019-06-14
EP3193357A1 (en) 2017-07-19
KR102088279B1 (en) 2020-03-12

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