SG11201403501PA - Composite substrate - Google Patents

Composite substrate

Info

Publication number
SG11201403501PA
SG11201403501PA SG11201403501PA SG11201403501PA SG11201403501PA SG 11201403501P A SG11201403501P A SG 11201403501PA SG 11201403501P A SG11201403501P A SG 11201403501PA SG 11201403501P A SG11201403501P A SG 11201403501PA SG 11201403501P A SG11201403501P A SG 11201403501PA
Authority
SG
Singapore
Prior art keywords
composite substrate
composite
substrate
Prior art date
Application number
SG11201403501PA
Other languages
English (en)
Inventor
Shigeru Konishi
Yoshihiro Kubota
Makoto Kawai
Original Assignee
Shinetsu Chemical Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinetsu Chemical Co filed Critical Shinetsu Chemical Co
Publication of SG11201403501PA publication Critical patent/SG11201403501PA/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H01L21/2003Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
    • H01L21/2007Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Ceramic Products (AREA)
  • Recrystallisation Techniques (AREA)
SG11201403501PA 2011-12-22 2012-12-20 Composite substrate SG11201403501PA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2011280806 2011-12-22
PCT/JP2012/082999 WO2013094665A1 (ja) 2011-12-22 2012-12-20 複合基板

Publications (1)

Publication Number Publication Date
SG11201403501PA true SG11201403501PA (en) 2014-09-26

Family

ID=48668548

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11201403501PA SG11201403501PA (en) 2011-12-22 2012-12-20 Composite substrate

Country Status (8)

Country Link
US (1) US9425248B2 (ja)
EP (1) EP2797107B1 (ja)
JP (1) JP5928481B2 (ja)
KR (1) KR101852229B1 (ja)
CN (1) CN104040685B (ja)
SG (1) SG11201403501PA (ja)
TW (1) TWI556975B (ja)
WO (1) WO2013094665A1 (ja)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9716107B2 (en) 2014-02-21 2017-07-25 Shin-Etsu Chemical Co., Ltd. Composite substrate
JP6208646B2 (ja) * 2014-09-30 2017-10-04 信越化学工業株式会社 貼り合わせ基板とその製造方法、および貼り合わせ用支持基板
JP2017059598A (ja) * 2015-09-14 2017-03-23 株式会社東芝 ウェーハ及び半導体装置
DE112017004718T5 (de) * 2016-09-20 2019-06-13 Ngk Insulators, Ltd. Verbundsubstrat, Verfahren zu seiner Herstellung und elektronische Vorrichtung
US11069560B2 (en) 2016-11-01 2021-07-20 Shin-Etsu Chemical Co., Ltd. Method of transferring device layer to transfer substrate and highly thermal conductive substrate
US11361969B2 (en) 2017-07-14 2022-06-14 Shin-Etsu Chemical Co., Ltd. Device substrate with high thermal conductivity and method of manufacturing the same
CN110943066A (zh) * 2018-09-21 2020-03-31 联华电子股份有限公司 具有高电阻晶片的半导体结构及高电阻晶片的接合方法
US11594441B2 (en) 2021-04-09 2023-02-28 Applied Materials, Inc. Handling for high resistivity substrates

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60254722A (ja) 1984-05-31 1985-12-16 Nec Corp 半導体装置用基板
DE4017181C2 (de) * 1990-05-29 1998-08-27 Daimler Benz Aerospace Ag Elektrisches Bauelement
JP3047986B2 (ja) 1990-07-25 2000-06-05 株式会社日立製作所 半導体装置
JPH07202063A (ja) * 1993-12-28 1995-08-04 Toshiba Corp セラミックス回路基板
US5877094A (en) 1994-04-07 1999-03-02 International Business Machines Corporation Method for fabricating a silicon-on-sapphire wafer
IT1268123B1 (it) 1994-10-13 1997-02-20 Sgs Thomson Microelectronics Fetta di materiale semiconduttore per la fabbricazione di dispositivi integrati e procedimento per la sua fabbricazione.
US6391812B1 (en) 1999-06-23 2002-05-21 Ngk Insulators, Ltd. Silicon nitride sintered body and method of producing the same
JP4571728B2 (ja) * 1999-06-23 2010-10-27 日本碍子株式会社 窒化珪素焼結体及びその製造方法
JP4714423B2 (ja) * 2004-01-06 2011-06-29 Okiセミコンダクタ株式会社 半導体ウエハとその製造方法
JP4975974B2 (ja) * 2005-03-18 2012-07-11 ラピスセミコンダクタ株式会社 Sosウェハおよびその製造方法
US7446284B2 (en) * 2005-12-21 2008-11-04 Momentive Performance Materials Inc. Etch resistant wafer processing apparatus and method for producing the same
EP1901345A1 (en) * 2006-08-30 2008-03-19 Siltronic AG Multilayered semiconductor wafer and process for manufacturing the same
JP4458116B2 (ja) * 2007-05-30 2010-04-28 住友電気工業株式会社 エピタキシャル層成長用iii族窒化物半導体層貼り合わせ基板および半導体デバイス
US20100193900A1 (en) 2007-07-13 2010-08-05 National University Corporation Tohoku University Soi substrate and semiconductor device using an soi substrate
JP2009081223A (ja) * 2007-09-26 2009-04-16 Tokyo Electron Ltd 静電チャック部材
JP5532680B2 (ja) 2009-05-27 2014-06-25 信越半導体株式会社 Soiウェーハの製造方法およびsoiウェーハ
JP5926887B2 (ja) * 2010-02-03 2016-05-25 株式会社半導体エネルギー研究所 Soi基板の作製方法
US9184228B2 (en) * 2011-03-07 2015-11-10 Sumitomo Electric Industries, Ltd. Composite base including sintered base and base surface flattening layer, and composite substrate including that composite base and semiconductor crystalline layer

Also Published As

Publication number Publication date
JPWO2013094665A1 (ja) 2015-04-27
US9425248B2 (en) 2016-08-23
EP2797107A4 (en) 2015-08-05
EP2797107B1 (en) 2017-09-20
WO2013094665A1 (ja) 2013-06-27
US20140327116A1 (en) 2014-11-06
TWI556975B (zh) 2016-11-11
EP2797107A1 (en) 2014-10-29
CN104040685B (zh) 2016-11-02
JP5928481B2 (ja) 2016-06-01
CN104040685A (zh) 2014-09-10
TW201341200A (zh) 2013-10-16
KR101852229B1 (ko) 2018-04-25
KR20140108221A (ko) 2014-09-05

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