SG10201903614XA - Semiconductor module - Google Patents

Semiconductor module

Info

Publication number
SG10201903614XA
SG10201903614XA SG10201903614XA SG10201903614XA SG 10201903614X A SG10201903614X A SG 10201903614XA SG 10201903614X A SG10201903614X A SG 10201903614XA SG 10201903614X A SG10201903614X A SG 10201903614XA
Authority
SG
Singapore
Prior art keywords
semiconductor module
upper packages
module substrate
row
top surface
Prior art date
Application number
Inventor
JANG Jae-Seok
Jang Dongmin
PARK Geunje
Lee Jaekwang
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of SG10201903614XA publication Critical patent/SG10201903614XA/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19102Disposition of discrete passive components in a stacked assembly with the semiconductor or solid state device
    • H01L2924/19104Disposition of discrete passive components in a stacked assembly with the semiconductor or solid state device on the semiconductor or solid-state device, i.e. passive-on-chip
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19105Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Geometry (AREA)
  • Semiconductor Memories (AREA)
  • Bipolar Transistors (AREA)

Abstract

A semiconductor module includes a module substrate having a first side extending in a first direction, a plurality of upper packages disposed on a top surface of the module substrate and arranged in rows extending in the first direction, and a passive element disposed on the top surface of the module substrate. At least a portion of the passive 5 element overlaps one of the upper packages when viewed in a plan view, and the upper packages of a first row are arranged to be shifted with respect to the upper packages of a second row in the first direction. FIG. 1A
SG10201903614X 2018-04-27 2019-04-23 Semiconductor module SG10201903614XA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR20180049006 2018-04-27
KR1020180097116A KR102560781B1 (en) 2018-04-27 2018-08-21 Semiconductor module

Publications (1)

Publication Number Publication Date
SG10201903614XA true SG10201903614XA (en) 2019-11-28

Family

ID=68541842

Family Applications (1)

Application Number Title Priority Date Filing Date
SG10201903614X SG10201903614XA (en) 2018-04-27 2019-04-23 Semiconductor module

Country Status (3)

Country Link
KR (1) KR102560781B1 (en)
SG (1) SG10201903614XA (en)
TW (1) TWI822739B (en)

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3540736B1 (en) * 2006-12-14 2023-07-26 Rambus Inc. Multi-die memory device
US7983051B2 (en) * 2008-04-09 2011-07-19 Apacer Technology Inc. DRAM module with solid state disk
KR20110037402A (en) * 2009-10-06 2011-04-13 삼성전자주식회사 Passive device, semiconductor module, electronic circuit board, and electronic system having the same and method of fabricating and inspecting the semiconductor module
US9263186B2 (en) * 2013-03-05 2016-02-16 Qualcomm Incorporated DC/ AC dual function Power Delivery Network (PDN) decoupling capacitor
KR20150031963A (en) * 2013-09-17 2015-03-25 삼성전자주식회사 Memory module and manufacturing method thereof
KR102497239B1 (en) * 2015-12-17 2023-02-08 삼성전자주식회사 Semiconductor modules having high speed characteristics

Also Published As

Publication number Publication date
KR102560781B1 (en) 2023-07-31
TW202002221A (en) 2020-01-01
TWI822739B (en) 2023-11-21
KR20190125148A (en) 2019-11-06

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