SG10201805946SA - Semiconductor package - Google Patents
Semiconductor packageInfo
- Publication number
- SG10201805946SA SG10201805946SA SG10201805946SA SG10201805946SA SG10201805946SA SG 10201805946S A SG10201805946S A SG 10201805946SA SG 10201805946S A SG10201805946S A SG 10201805946SA SG 10201805946S A SG10201805946S A SG 10201805946SA SG 10201805946S A SG10201805946S A SG 10201805946SA
- Authority
- SG
- Singapore
- Prior art keywords
- substrate
- semiconductor package
- mold layer
- semiconductor chip
- alignment protrusion
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
- H01L25/073—Apertured devices mounted on one or more rods passed through the apertures
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
- H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
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- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
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- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
- H01L25/105—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L27/00
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- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54426—Marks applied to semiconductor devices or parts for alignment
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/0652—Bump or bump-like direct electrical connections from substrate to substrate
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- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
- H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
- H01L2225/1017—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support
- H01L2225/1023—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support the support being an insulating substrate
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- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
- H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
- H01L2225/1047—Details of electrical connections between containers
- H01L2225/1058—Bump or bump-like electrical connections, e.g. balls, pillars, posts
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- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
- H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
- H01L2225/1076—Shape of the containers
- H01L2225/1082—Shape of the containers for improving alignment between containers, e.g. interlocking features
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
- H01L2924/1816—Exposing the passive side of the semiconductor or solid-state body
- H01L2924/18161—Exposing the passive side of the semiconductor or solid-state body of a flip chip
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Coupling Device And Connection With Printed Circuit (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
A semiconductor package includes a first semiconductor chip on a first substrate, a first mold layer provided on the first substrate to cover a side surface of the first semiconductor chip, a solder structure provided on the first substrate, and a second substrate provided 5 on the solder structure. A guide receptacle is formed at one of a top surface of the first mold layer and a bottom surface of the second substrate, a first alignment protrusion is formed at the other of the top surface of the first mold layer and the bottom surface of the second substrate, and at least a portion of the first alignment protrusion is provided in the guide receptacle. 10 FIG. 1
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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KR1020170127034A KR102427557B1 (en) | 2017-09-29 | 2017-09-29 | Semiconductor package |
Publications (1)
Publication Number | Publication Date |
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SG10201805946SA true SG10201805946SA (en) | 2019-04-29 |
Family
ID=65897416
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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SG10201805946SA SG10201805946SA (en) | 2017-09-29 | 2018-07-11 | Semiconductor package |
Country Status (4)
Country | Link |
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US (1) | US10475749B2 (en) |
KR (1) | KR102427557B1 (en) |
CN (1) | CN109585390B (en) |
SG (1) | SG10201805946SA (en) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10622340B2 (en) * | 2016-11-21 | 2020-04-14 | Samsung Electronics Co., Ltd. | Semiconductor package |
US10757800B1 (en) | 2017-06-22 | 2020-08-25 | Flex Ltd. | Stripline transmission lines with cross-hatched pattern return plane, where the striplines do not overlap any intersections in the cross-hatched pattern |
KR102448248B1 (en) * | 2018-05-24 | 2022-09-27 | 삼성전자주식회사 | Package-on-package type semiconductor package and method for fabricating the same |
KR102497572B1 (en) * | 2018-07-03 | 2023-02-09 | 삼성전자주식회사 | Semiconductor package and method of forming the same |
US11224117B1 (en) | 2018-07-05 | 2022-01-11 | Flex Ltd. | Heat transfer in the printed circuit board of an SMPS by an integrated heat exchanger |
US10964660B1 (en) | 2018-11-20 | 2021-03-30 | Flex Ltd. | Use of adhesive films for 3D pick and place assembly of electronic components |
JP7163162B2 (en) * | 2018-12-10 | 2022-10-31 | 新光電気工業株式会社 | semiconductor package |
US10896877B1 (en) * | 2018-12-14 | 2021-01-19 | Flex Ltd. | System in package with double side mounted board |
KR20210126228A (en) | 2020-04-10 | 2021-10-20 | 삼성전자주식회사 | Semiconductor package |
KR20220048532A (en) * | 2020-10-12 | 2022-04-20 | 삼성전자주식회사 | Semiconductor package and manufacturing method thereof |
KR20220049975A (en) * | 2020-10-15 | 2022-04-22 | 삼성전자주식회사 | Semiconductor package |
KR20230015402A (en) * | 2021-01-26 | 2023-01-31 | 양쯔 메모리 테크놀로지스 씨오., 엘티디. | Substrate structure, manufacturing and packaging method thereof |
CN113506749B (en) * | 2021-09-08 | 2021-11-12 | 南通汇丰电子科技有限公司 | Chip stacking body and preparation method thereof |
KR20230056188A (en) * | 2021-10-20 | 2023-04-27 | 삼성전자주식회사 | Semiconductor package |
Family Cites Families (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1122567A1 (en) * | 2000-02-02 | 2001-08-08 | Corning Incorporated | Passive alignement using slanted wall pedestal |
KR20050006547A (en) | 2003-07-09 | 2005-01-17 | 앰코 테크놀로지 코리아 주식회사 | PCB for fabricating semiconductor package and semiconductor package using the same |
SG157362A1 (en) | 2004-11-04 | 2009-12-29 | Microchips Inc | Compression and cold weld sealing methods and devices |
US7378734B2 (en) | 2006-05-30 | 2008-05-27 | Touchdown Technologies, Inc. | Stacked contact bump |
KR20070062087A (en) | 2005-12-12 | 2007-06-15 | 삼성전자주식회사 | Multi stack package |
DE102007027435A1 (en) * | 2007-06-14 | 2008-12-18 | X-Fab Semiconductor Foundries Ag | Method and device for structured layer deposition on processed microsystem technology wafers |
KR20090030540A (en) * | 2007-09-20 | 2009-03-25 | 삼성전자주식회사 | Semiconductor package, apparatus and method for manufacturing the same, and electronic device equipped with the semiconductor package |
US7777351B1 (en) | 2007-10-01 | 2010-08-17 | Amkor Technology, Inc. | Thin stacked interposer package |
US9136259B2 (en) * | 2008-04-11 | 2015-09-15 | Micron Technology, Inc. | Method of creating alignment/centering guides for small diameter, high density through-wafer via die stacking |
US20100072600A1 (en) * | 2008-09-22 | 2010-03-25 | Texas Instrument Incorporated | Fine-pitch oblong solder connections for stacking multi-chip packages |
US8115319B2 (en) * | 2010-03-04 | 2012-02-14 | Powertech Technology Inc. | Flip chip package maintaining alignment during soldering |
KR20110139367A (en) | 2010-06-23 | 2011-12-29 | 앰코 테크놀로지 코리아 주식회사 | Semiconductor package for preventing misalignment |
KR20120048841A (en) | 2010-11-08 | 2012-05-16 | 에스케이하이닉스 주식회사 | Stacked semiconductor package |
KR101817159B1 (en) | 2011-02-17 | 2018-02-22 | 삼성전자 주식회사 | Semiconductor package having TSV interposer and method of manufacturing the same |
KR101852601B1 (en) | 2011-05-31 | 2018-04-27 | 삼성전자주식회사 | Semiconductor package apparatus |
US9209163B2 (en) | 2011-08-19 | 2015-12-08 | Marvell World Trade Ltd. | Package-on-package structures |
KR20130123722A (en) | 2012-05-03 | 2013-11-13 | 에스케이하이닉스 주식회사 | Semiconductor chip and stacked semiconductor package having the same |
US8970024B2 (en) | 2013-03-14 | 2015-03-03 | Taiwan Semiconductor Manufacturing Company, Ltd. | Packages with molding material forming steps |
KR102134133B1 (en) * | 2013-09-23 | 2020-07-16 | 삼성전자주식회사 | A semiconductor package and method of fabricating the same |
KR102157551B1 (en) * | 2013-11-08 | 2020-09-18 | 삼성전자주식회사 | A semiconductor package and method of fabricating the same |
KR20150091886A (en) | 2014-02-04 | 2015-08-12 | 삼성전자주식회사 | Semiconductor package having a heat slug |
KR102198858B1 (en) * | 2014-07-24 | 2021-01-05 | 삼성전자 주식회사 | Semiconductor package stack structure having interposer substrate |
KR102367404B1 (en) | 2015-08-03 | 2022-02-25 | 삼성전자주식회사 | Method of manufacturing semiconductor package |
US9947642B2 (en) * | 2015-10-02 | 2018-04-17 | Qualcomm Incorporated | Package-on-Package (PoP) device comprising a gap controller between integrated circuit (IC) packages |
US10622340B2 (en) | 2016-11-21 | 2020-04-14 | Samsung Electronics Co., Ltd. | Semiconductor package |
-
2017
- 2017-09-29 KR KR1020170127034A patent/KR102427557B1/en active IP Right Grant
-
2018
- 2018-05-04 US US15/971,253 patent/US10475749B2/en active Active
- 2018-07-11 SG SG10201805946SA patent/SG10201805946SA/en unknown
- 2018-09-18 CN CN201811089162.1A patent/CN109585390B/en active Active
Also Published As
Publication number | Publication date |
---|---|
KR102427557B1 (en) | 2022-08-01 |
US10475749B2 (en) | 2019-11-12 |
CN109585390B (en) | 2024-04-19 |
KR20190037559A (en) | 2019-04-08 |
US20190103364A1 (en) | 2019-04-04 |
CN109585390A (en) | 2019-04-05 |
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