SE9702346D0 - A substrate for high frequency integrated circuits - Google Patents
A substrate for high frequency integrated circuitsInfo
- Publication number
- SE9702346D0 SE9702346D0 SE9702346A SE9702346A SE9702346D0 SE 9702346 D0 SE9702346 D0 SE 9702346D0 SE 9702346 A SE9702346 A SE 9702346A SE 9702346 A SE9702346 A SE 9702346A SE 9702346 D0 SE9702346 D0 SE 9702346D0
- Authority
- SE
- Sweden
- Prior art keywords
- silicon
- particles
- layer
- integrated circuits
- substrate material
- Prior art date
Links
- 239000000758 substrate Substances 0.000 title abstract 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 6
- 229910052710 silicon Inorganic materials 0.000 abstract 6
- 239000010703 silicon Substances 0.000 abstract 6
- 239000002245 particle Substances 0.000 abstract 4
- 239000000463 material Substances 0.000 abstract 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- 238000000137 annealing Methods 0.000 abstract 1
- 230000004888 barrier function Effects 0.000 abstract 1
- 239000002800 charge carrier Substances 0.000 abstract 1
- 238000004519 manufacturing process Methods 0.000 abstract 1
- 239000002184 metal Substances 0.000 abstract 1
- 238000003672 processing method Methods 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 239000002210 silicon-based material Substances 0.000 abstract 1
- 238000004544 sputter deposition Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/185—Joining of semiconductor bodies for junction formation
- H01L21/187—Joining of semiconductor bodies for junction formation by direct bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28537—Deposition of Schottky electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
- H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
- H01L21/2007—Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/30—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by physical imperfections; having polished or roughened surface
- H01L29/32—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by physical imperfections; having polished or roughened surface the imperfections being within the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S977/00—Nanotechnology
- Y10S977/70—Nanostructure
- Y10S977/773—Nanoparticle, i.e. structure having three dimensions of 100 nm or less
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/25—Web or sheet containing structurally defined element or component and including a second component containing structurally defined particles
- Y10T428/252—Glass or ceramic [i.e., fired or glazed clay, cement, etc.] [porcelain, quartz, etc.]
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/25—Web or sheet containing structurally defined element or component and including a second component containing structurally defined particles
- Y10T428/256—Heavy metal or aluminum or compound thereof
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/25—Web or sheet containing structurally defined element or component and including a second component containing structurally defined particles
- Y10T428/259—Silicic material
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
- Element Separation (AREA)
- Recrystallisation Techniques (AREA)
Priority Applications (11)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SE9702346A SE511721C2 (sv) | 1997-06-18 | 1997-06-18 | Substrat för integrerade högfrekvenskretsar samt förfarande för substratframställning |
CA002294290A CA2294290A1 (en) | 1997-06-18 | 1998-06-17 | A substrate for high frequency integrated circuits |
PCT/SE1998/001178 WO1998058404A2 (en) | 1997-06-18 | 1998-06-17 | A substrate for high frequency integrated circuits |
US09/098,515 US6183857B1 (en) | 1997-06-18 | 1998-06-17 | Substrate for high frequency integrated circuits |
CN988061139A CN1132226C (zh) | 1997-06-18 | 1998-06-17 | 用于高频集成电路的衬底 |
KR10-1999-7011963A KR100510582B1 (ko) | 1997-06-18 | 1998-06-17 | 고주파 집적회로용 기판 |
AU80512/98A AU8051298A (en) | 1997-06-18 | 1998-06-17 | A substrate for high frequency integrated circuits |
JP50430099A JP2002503398A (ja) | 1997-06-18 | 1998-06-17 | 高周波集積回路用基板 |
EP98928804A EP0990263A2 (en) | 1997-06-18 | 1998-06-17 | A substrate for high frequency integrated circuits |
TW087109782A TW406380B (en) | 1997-06-18 | 1998-06-18 | A substrate for high frequency integrated circuits |
US09/737,263 US6475926B2 (en) | 1997-06-18 | 2000-12-13 | Substrate for high frequency integrated circuits |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SE9702346A SE511721C2 (sv) | 1997-06-18 | 1997-06-18 | Substrat för integrerade högfrekvenskretsar samt förfarande för substratframställning |
Publications (3)
Publication Number | Publication Date |
---|---|
SE9702346D0 true SE9702346D0 (sv) | 1997-06-18 |
SE9702346L SE9702346L (sv) | 1998-12-19 |
SE511721C2 SE511721C2 (sv) | 1999-11-15 |
Family
ID=20407433
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SE9702346A SE511721C2 (sv) | 1997-06-18 | 1997-06-18 | Substrat för integrerade högfrekvenskretsar samt förfarande för substratframställning |
Country Status (10)
Country | Link |
---|---|
US (2) | US6183857B1 (sv) |
EP (1) | EP0990263A2 (sv) |
JP (1) | JP2002503398A (sv) |
KR (1) | KR100510582B1 (sv) |
CN (1) | CN1132226C (sv) |
AU (1) | AU8051298A (sv) |
CA (1) | CA2294290A1 (sv) |
SE (1) | SE511721C2 (sv) |
TW (1) | TW406380B (sv) |
WO (1) | WO1998058404A2 (sv) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6423614B1 (en) * | 1998-06-30 | 2002-07-23 | Intel Corporation | Method of delaminating a thin film using non-thermal techniques |
US6463656B1 (en) * | 2000-06-29 | 2002-10-15 | Eastman Kodak Company | Laminate and gasket manfold for ink jet delivery systems and similar devices |
DE10134900B4 (de) * | 2001-07-18 | 2007-03-15 | Infineon Technologies Ag | Haltevorrichtung mit Diffusionssperrschicht für Halbleitereinrichtungen |
US6743662B2 (en) * | 2002-07-01 | 2004-06-01 | Honeywell International, Inc. | Silicon-on-insulator wafer for RF integrated circuit |
US7155746B2 (en) * | 2002-12-27 | 2007-01-02 | Kimberly-Clark Worldwide, Inc. | Anti-wicking protective workwear and methods of making and using same |
KR100539274B1 (ko) * | 2003-07-15 | 2005-12-27 | 삼성전자주식회사 | 코발트 막 증착 방법 |
US7419915B2 (en) * | 2005-02-17 | 2008-09-02 | The Aerospace Corporation | Laser assisted chemical etching method for release microscale and nanoscale devices |
US7371662B2 (en) * | 2006-03-21 | 2008-05-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for forming a 3D interconnect and resulting structures |
GB0717997D0 (en) * | 2007-09-14 | 2007-10-24 | Isis Innovation | Substrate for high frequency integrated circuit |
US8129817B2 (en) * | 2008-12-31 | 2012-03-06 | Taiwan Semiconductor Manufacturing Co., Ltd. | Reducing high-frequency signal loss in substrates |
CN106711027B (zh) * | 2017-02-13 | 2021-01-05 | 中国科学院上海微系统与信息技术研究所 | 晶圆键合方法及异质衬底制备方法 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4901121A (en) * | 1985-03-29 | 1990-02-13 | American Telephone & Telegraph Co., At&T Bell Labs. | Semiconductor device comprising a perforated metal silicide layer |
US4827324A (en) * | 1986-11-06 | 1989-05-02 | Siliconix Incorporated | Implantation of ions into an insulating layer to increase planar pn junction breakdown voltage |
US5387555A (en) * | 1992-09-03 | 1995-02-07 | Harris Corporation | Bonded wafer processing with metal silicidation |
US5344793A (en) * | 1993-03-05 | 1994-09-06 | Siemens Aktiengesellschaft | Formation of silicided junctions in deep sub-micron MOSFETs by defect enhanced CoSi2 formation |
JPH07263721A (ja) | 1994-03-25 | 1995-10-13 | Nippondenso Co Ltd | 半導体装置及びその製造方法 |
US5449642A (en) * | 1994-04-14 | 1995-09-12 | Duke University | Method of forming metal-disilicide layers and contacts |
US5605865A (en) * | 1995-04-03 | 1997-02-25 | Motorola Inc. | Method for forming self-aligned silicide in a semiconductor device using vapor phase reaction |
US5773151A (en) * | 1995-06-30 | 1998-06-30 | Harris Corporation | Semi-insulating wafer |
DE69617628T2 (de) * | 1995-09-18 | 2002-08-14 | Koninkl Philips Electronics Nv | Varicapdiode und verfahren zur herstellung |
-
1997
- 1997-06-18 SE SE9702346A patent/SE511721C2/sv not_active IP Right Cessation
-
1998
- 1998-06-17 CN CN988061139A patent/CN1132226C/zh not_active Expired - Fee Related
- 1998-06-17 EP EP98928804A patent/EP0990263A2/en not_active Withdrawn
- 1998-06-17 CA CA002294290A patent/CA2294290A1/en not_active Abandoned
- 1998-06-17 WO PCT/SE1998/001178 patent/WO1998058404A2/en active IP Right Grant
- 1998-06-17 KR KR10-1999-7011963A patent/KR100510582B1/ko not_active IP Right Cessation
- 1998-06-17 US US09/098,515 patent/US6183857B1/en not_active Expired - Lifetime
- 1998-06-17 JP JP50430099A patent/JP2002503398A/ja not_active Ceased
- 1998-06-17 AU AU80512/98A patent/AU8051298A/en not_active Abandoned
- 1998-06-18 TW TW087109782A patent/TW406380B/zh not_active IP Right Cessation
-
2000
- 2000-12-13 US US09/737,263 patent/US6475926B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US6183857B1 (en) | 2001-02-06 |
KR20010013941A (ko) | 2001-02-26 |
KR100510582B1 (ko) | 2005-08-26 |
US20010001045A1 (en) | 2001-05-10 |
JP2002503398A (ja) | 2002-01-29 |
CA2294290A1 (en) | 1998-12-23 |
SE511721C2 (sv) | 1999-11-15 |
CN1260906A (zh) | 2000-07-19 |
EP0990263A2 (en) | 2000-04-05 |
WO1998058404A3 (en) | 1999-03-11 |
SE9702346L (sv) | 1998-12-19 |
CN1132226C (zh) | 2003-12-24 |
WO1998058404A2 (en) | 1998-12-23 |
US6475926B2 (en) | 2002-11-05 |
TW406380B (en) | 2000-09-21 |
AU8051298A (en) | 1999-01-04 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6717213B2 (en) | Creation of high mobility channels in thin-body SOI devices | |
US6083324A (en) | Gettering technique for silicon-on-insulator wafers | |
SG125932A1 (en) | Method of forming strained silicon on insulator substrate | |
US7674687B2 (en) | Method and structure for fabricating multiple tiled regions onto a plate using a controlled cleaving process | |
US6184111B1 (en) | Pre-semiconductor process implant and post-process film separation | |
US4317686A (en) | Method of manufacturing field-effect transistors by forming double insulative buried layers by ion-implantation | |
US7498229B1 (en) | Transistor and in-situ fabrication process | |
SE9702346D0 (sv) | A substrate for high frequency integrated circuits | |
US20020090758A1 (en) | Method and resulting device for manufacturing for double gated transistors | |
TW200511578A (en) | Self-aligned SOI with different crystal orientation using wafer bonding and simox processes | |
US9786613B2 (en) | EMI shield for high frequency layer transferred devices | |
WO2003105204A3 (en) | SEMICONDUCTOR DEVICES INCLUDING TWO CHANNEL VOLTAGE CONSTRAINED LAYERS | |
FR2828762B1 (fr) | Procede d'obtention d'une couche mince d'un materiau semi-conducteur supportant au moins un composant et/ou circuit electronique | |
US8822318B2 (en) | Doping of semiconductor substrate through carbonless phosphorous-containing layer | |
TW200608590A (en) | Structures and methods for manufacturing of dislocation free stressed channels in bulk silicon and SOI CMOS devices by gate stress engineering with sige and/or Si:c | |
KR20170033792A (ko) | 라디오주파수 어플리케이션들을 위한 구조물 및 이러한 구조물의 제조 방법 | |
US3996655A (en) | Processes of forming insulated gate field effect transistors with channel lengths of one micron in integrated circuits with component isolated and product | |
FR2842350B1 (fr) | Procede de transfert d'une couche de materiau semiconducteur contraint | |
JP2010016188A (ja) | 半導体装置の製造方法および半導体装置 | |
CN107799465A (zh) | 半导体结构和相关方法 | |
US8241998B2 (en) | Method of producing an SOI structure with an insulating layer of controlled thickness | |
US9245943B2 (en) | Semiconductor body with strained monocrystalline region | |
EP1864317A1 (en) | Hybrid fully soi-type multilayer structure | |
TW200610010A (en) | Plasma treatment method for electromigration reduction | |
US20150243548A1 (en) | Control of FET Back-Channel Interface Characteristics |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
NUG | Patent has lapsed |