SE9604102L - Förfarande och anordning för att DC-mässigt anpassa en första krets till minst en andra krets - Google Patents

Förfarande och anordning för att DC-mässigt anpassa en första krets till minst en andra krets

Info

Publication number
SE9604102L
SE9604102L SE9604102A SE9604102A SE9604102L SE 9604102 L SE9604102 L SE 9604102L SE 9604102 A SE9604102 A SE 9604102A SE 9604102 A SE9604102 A SE 9604102A SE 9604102 L SE9604102 L SE 9604102L
Authority
SE
Sweden
Prior art keywords
circuit
resistance
signal input
current
voltage
Prior art date
Application number
SE9604102A
Other languages
Unknown language ( )
English (en)
Other versions
SE510612C2 (sv
SE9604102D0 (sv
Inventor
Hans Eriksson
Elisabeth Larsson
Original Assignee
Ericsson Telefon Ab L M
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Telefon Ab L M filed Critical Ericsson Telefon Ab L M
Priority to SE9604102A priority Critical patent/SE510612C2/sv
Publication of SE9604102D0 publication Critical patent/SE9604102D0/sv
Priority to TW086107847A priority patent/TW492237B/zh
Priority to US08/961,208 priority patent/US6259298B1/en
Priority to AU49748/97A priority patent/AU4974897A/en
Priority to CA002271112A priority patent/CA2271112A1/en
Priority to DE69736483T priority patent/DE69736483D1/de
Priority to EP97912623A priority patent/EP0934632B1/en
Priority to PCT/SE1997/001860 priority patent/WO1998021835A2/en
Priority to JP52246198A priority patent/JP2001504654A/ja
Priority to CN97199424A priority patent/CN1115794C/zh
Priority to KR1019997003787A priority patent/KR100320316B1/ko
Publication of SE9604102L publication Critical patent/SE9604102L/sv
Publication of SE510612C2 publication Critical patent/SE510612C2/sv

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B3/00—Line transmission systems
    • H04B3/02—Details
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/003—Changing the DC level

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)
  • Amplifiers (AREA)
  • Devices For Supply Of Signal Current (AREA)
SE9604102A 1996-11-08 1996-11-08 Förfarande och anordning för att Likströmsmässigt anpassa en första krets till minst en andra krets SE510612C2 (sv)

Priority Applications (11)

Application Number Priority Date Filing Date Title
SE9604102A SE510612C2 (sv) 1996-11-08 1996-11-08 Förfarande och anordning för att Likströmsmässigt anpassa en första krets till minst en andra krets
TW086107847A TW492237B (en) 1996-11-08 1997-06-06 A method and an arrangement for adapting, from a DC point of view, a first circuit to at least one second circuit
US08/961,208 US6259298B1 (en) 1996-11-08 1997-10-30 Method and an arrangement for adapting from a DC point of view a first circuit to at least one second circuit
KR1019997003787A KR100320316B1 (ko) 1996-11-08 1997-11-06 제1 회로의 신호 입력을 적어도 한 개의 제2 회로의 신호 출력으로 직류(dc)를 적용하는 방법 및 장치
CA002271112A CA2271112A1 (en) 1996-11-08 1997-11-06 A method and an arrangement for adapting, from a dc point of view, a first circuit to at least one second circuit
AU49748/97A AU4974897A (en) 1996-11-08 1997-11-06 A method and an arrangement for adapting, from a dc point of view, a first circuit to at least one second circuit
DE69736483T DE69736483D1 (de) 1996-11-08 1997-11-06 Ein verfahren und eine anordnung zum dc-anpassen einer ersten schaltung an eine zweite schaltung
EP97912623A EP0934632B1 (en) 1996-11-08 1997-11-06 A method and an arrangement for adapting, from a dc point of view, a first circuit to at least one second circuit
PCT/SE1997/001860 WO1998021835A2 (en) 1996-11-08 1997-11-06 A method and an arrangement for adapting, from a dc point of view, a first circuit to at least one second circuit
JP52246198A JP2001504654A (ja) 1996-11-08 1997-11-06 直流の観点から第一回路を少なくとも１つの第二回路に適合させるための方法並びに装置
CN97199424A CN1115794C (zh) 1996-11-08 1997-11-06 使第一电路直流上适合于至少一个第二电路的方法和装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE9604102A SE510612C2 (sv) 1996-11-08 1996-11-08 Förfarande och anordning för att Likströmsmässigt anpassa en första krets till minst en andra krets

Publications (3)

Publication Number Publication Date
SE9604102D0 SE9604102D0 (sv) 1996-11-08
SE9604102L true SE9604102L (sv) 1998-05-09
SE510612C2 SE510612C2 (sv) 1999-06-07

Family

ID=20404547

Family Applications (1)

Application Number Title Priority Date Filing Date
SE9604102A SE510612C2 (sv) 1996-11-08 1996-11-08 Förfarande och anordning för att Likströmsmässigt anpassa en första krets till minst en andra krets

Country Status (11)

Country Link
US (1) US6259298B1 (sv)
EP (1) EP0934632B1 (sv)
JP (1) JP2001504654A (sv)
KR (1) KR100320316B1 (sv)
CN (1) CN1115794C (sv)
AU (1) AU4974897A (sv)
CA (1) CA2271112A1 (sv)
DE (1) DE69736483D1 (sv)
SE (1) SE510612C2 (sv)
TW (1) TW492237B (sv)
WO (1) WO1998021835A2 (sv)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4586544B2 (ja) * 2004-02-17 2010-11-24 東京エレクトロン株式会社 被処理体の酸化方法、酸化装置及び記憶媒体
US20100321083A1 (en) * 2009-06-22 2010-12-23 International Business Machines Corporation Voltage Level Translating Circuit

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5330205Y2 (sv) * 1972-11-13 1978-07-28
US4716319A (en) * 1986-08-04 1987-12-29 Motorola, Inc. Switched capacitor filter for low voltage applications
US5140196A (en) * 1991-04-15 1992-08-18 Motorola, Inc. Variable level translator
US5321324A (en) 1993-01-28 1994-06-14 United Memories, Inc. Low-to-high voltage translator with latch-up immunity
US5486778A (en) 1993-03-10 1996-01-23 Brooktree Corporation Input buffer for translating TTL levels to CMOS levels
DE69310162T2 (de) * 1993-06-15 1997-09-25 Alcatel Bell Nv Pegelumsetzungsschaltung
JPH08181546A (ja) * 1994-12-27 1996-07-12 Mitsubishi Electric Corp レベルシフト回路
US5541531A (en) 1995-05-01 1996-07-30 Ford Motor Company Switch capacitor interface circuit
US5604450A (en) * 1995-07-27 1997-02-18 Intel Corporation High speed bidirectional signaling scheme
US5731711A (en) * 1996-06-26 1998-03-24 Lucent Technologies Inc. Integrated circuit chip with adaptive input-output port

Also Published As

Publication number Publication date
US6259298B1 (en) 2001-07-10
KR20000052919A (ko) 2000-08-25
JP2001504654A (ja) 2001-04-03
TW492237B (en) 2002-06-21
SE510612C2 (sv) 1999-06-07
WO1998021835A3 (en) 1998-06-25
WO1998021835A2 (en) 1998-05-22
CA2271112A1 (en) 1998-05-22
CN1235717A (zh) 1999-11-17
EP0934632A2 (en) 1999-08-11
AU4974897A (en) 1998-06-03
EP0934632B1 (en) 2006-08-09
CN1115794C (zh) 2003-07-23
KR100320316B1 (ko) 2002-01-15
SE9604102D0 (sv) 1996-11-08
DE69736483D1 (de) 2006-09-21

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Legal Events

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