SE8500156L - PROCEDURE FOR PROCESSING MACHINE-CODED INSTRUCTION WORDS AND DATA PROCESSOR FOR EXECUTING THE PROCEDURE - Google Patents

PROCEDURE FOR PROCESSING MACHINE-CODED INSTRUCTION WORDS AND DATA PROCESSOR FOR EXECUTING THE PROCEDURE

Info

Publication number
SE8500156L
SE8500156L SE8500156A SE8500156A SE8500156L SE 8500156 L SE8500156 L SE 8500156L SE 8500156 A SE8500156 A SE 8500156A SE 8500156 A SE8500156 A SE 8500156A SE 8500156 L SE8500156 L SE 8500156L
Authority
SE
Sweden
Prior art keywords
opcode
procedure
instruction words
virtual
executing
Prior art date
Application number
SE8500156A
Other languages
Swedish (sv)
Other versions
SE8500156D0 (en
Inventor
G A Slavenburg
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from NL8400129A external-priority patent/NL8400129A/en
Priority claimed from NL8403628A external-priority patent/NL8403628A/en
Application filed by Philips Nv filed Critical Philips Nv
Publication of SE8500156D0 publication Critical patent/SE8500156D0/en
Publication of SE8500156L publication Critical patent/SE8500156L/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/3017—Runtime instruction translation, e.g. macros
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/3016—Decoding the operand specifier, e.g. specifier format
    • G06F9/30167—Decoding the operand specifier, e.g. specifier format of immediate specifier, e.g. constants

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Devices For Executing Special Programs (AREA)

Abstract

The invention relates to a method of handling machine-coded instruction words. The instruction words each comprise an opcode part and an operand descriptor part. The collection of opcode parts is subdivided into two classes. A first class comprises normal opcode parts which are processed in known manner, while a second class comprises virtual opcode parts which are processed in a particular manner. This particular manner implies inter alia that the instantaneous program counter position is temporarily stored in a supplementary program counter register and that a memory address is determined. When an opcode part of the virtual type is decoded the associated operand descriptor part is loaded into an index register. The descriptor part of an instruction with virtual opcode is handled by a series of instructions, the first of which is located at the said memory address. <IMAGE>
SE8500156A 1984-01-16 1985-01-14 PROCEDURE FOR PROCESSING MACHINE-CODED INSTRUCTION WORDS AND DATA PROCESSOR FOR EXECUTING THE PROCEDURE SE8500156L (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NL8400129A NL8400129A (en) 1984-01-16 1984-01-16 METHOD FOR PROCESSING MACHINE-CODED INSTRUCTION WORDS, AND DATA PROCESSOR FOR PERFORMING THE METHOD
NL8403628A NL8403628A (en) 1984-11-29 1984-11-29 Processing of machine code instructions - using instructions with two part operation code, first being of normal structure and second acting as virtual operation code

Publications (2)

Publication Number Publication Date
SE8500156D0 SE8500156D0 (en) 1985-01-14
SE8500156L true SE8500156L (en) 1985-07-17

Family

ID=26645921

Family Applications (1)

Application Number Title Priority Date Filing Date
SE8500156A SE8500156L (en) 1984-01-16 1985-01-14 PROCEDURE FOR PROCESSING MACHINE-CODED INSTRUCTION WORDS AND DATA PROCESSOR FOR EXECUTING THE PROCEDURE

Country Status (5)

Country Link
CA (1) CA1232075A (en)
DE (1) DE3500377A1 (en)
FR (1) FR2573228A1 (en)
GB (1) GB2153561B (en)
SE (1) SE8500156L (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3685117D1 (en) * 1986-12-30 1992-06-04 Ibm DEVICE AND METHOD FOR EXTENDING THE COMMAND SET AND THE FUNCTIONS OF A COMPUTER.
US7624374B2 (en) 2005-08-30 2009-11-24 Microsoft Corporation Readers and scanner design pattern

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2846495C2 (en) * 1977-10-25 1993-10-21 Digital Equipment Corp Central unit
US4293907A (en) * 1978-12-29 1981-10-06 Bell Telephone Laboratories, Incorporated Data processing apparatus having op-code extension register

Also Published As

Publication number Publication date
GB8500682D0 (en) 1985-02-13
GB2153561B (en) 1987-06-17
DE3500377A1 (en) 1985-07-25
CA1232075A (en) 1988-01-26
GB2153561A (en) 1985-08-21
FR2573228A1 (en) 1986-05-16
SE8500156D0 (en) 1985-01-14

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Effective date: 19881004

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