SE501079C2 - Method for etching silicon areas on insulating substrates - Google Patents

Method for etching silicon areas on insulating substrates

Info

Publication number
SE501079C2
SE501079C2 SE9301246A SE9301246A SE501079C2 SE 501079 C2 SE501079 C2 SE 501079C2 SE 9301246 A SE9301246 A SE 9301246A SE 9301246 A SE9301246 A SE 9301246A SE 501079 C2 SE501079 C2 SE 501079C2
Authority
SE
Sweden
Prior art keywords
silicon
areas
silicon film
oxidized
insulating substrate
Prior art date
Application number
SE9301246A
Other languages
Swedish (sv)
Other versions
SE9301246D0 (en
SE9301246L (en
Inventor
Goeran Alestig
Kjell Bohlin
Nils Oegren
Original Assignee
Asea Brown Boveri
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Asea Brown Boveri filed Critical Asea Brown Boveri
Priority to SE9301246A priority Critical patent/SE501079C2/en
Publication of SE9301246D0 publication Critical patent/SE9301246D0/en
Priority to PCT/SE1994/000310 priority patent/WO1994024695A1/en
Publication of SE9301246L publication Critical patent/SE9301246L/en
Publication of SE501079C2 publication Critical patent/SE501079C2/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
    • H01L21/86—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body the insulating body being sapphire, e.g. silicon on sapphire structure, i.e. SOS
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting

Abstract

A method of manufacturing integrated circuits on a wafer, which at least comprises an insulating substrate (10) coated with a silicon film (11). Silicon regions (11b) are etched out on the silicon film applied to the insulating substrate by a process whereby the surface on the silicon film is oxidized such that a thin layer of silicon oxide (12) is formed, a thin layer of silicon nitride (13) is deposited on the oxide layer, a photoresist is applied (14) and patterned with photolithographic methods to define protected resist regions, whereupon the nitride is etched away from unprotected regions with an etching medium which interrupts the etching when the underlying oxide layer is reached whereas the silicon nitride remains on those regions which are covered by photoresist, the photoresist is removed before the wafer is subjected to an oxidation in which unprotected regions of the silicon film are oxidized wheras regions (11a) coated with silicon nitride are not oxidized, and the oxide and the nitride are finally removed with an etching medium which does not attack silicon.

Description

15 20 25 30 35 501 079 2 En process för att vid tillverkning av integrerade kretsar definiera de kiselomraden där de aktiva komponenterna ska bildas kallas LOCOS, LOCal Oxidation of Silicon. LOCOS- metoden används huvudsakligen för homogena kiselskivor utan isolerande substrat men kan även användas för kiselfilmer palagda pa isolerande substrat. I LOCOS-metoden deponeras ett kiselnitridskikt pa kislet. Med fotolitografiska metoder palägges därefter en fotoresist pa de omraden där aktiva komponenter skall bildas. Nitriden etsas bort fran de omraden där den ej skyddas av fotoresist varefter fotoresis- ten avlägsnas. Därefter oxideras de omraden vilka ej är skyddade med kiselnitrid. Denna oxid gros med hjälp av syrgas eller vattenanga vid hög temperatur. Slutligen etsas kvarvarande kiselnitridfilm bort med en lämplig syra, sasom fosforsyra, som ej angriper oxiden. De aktiva komponenterna tillverkas sedan i de omraden vilka ej täcks av oxid, medan oxiden ger isolering mellan komponenterna. 15 20 25 30 35 501 079 2 A process for defining the silicon areas in which the active components are to be formed in the manufacture of integrated circuits is called LOCOS, LOCal Oxidation of Silicon. The LOCOS method is mainly used for homogeneous silicon wafers without insulating substrates, but can also be used for silicon films coated on insulating substrates. In the LOCOS method, a silicon nitride layer is deposited on the silicon. Photolithographic methods then apply a photoresist to the areas where active components are to be formed. The nitride is etched away from the areas where it is not protected by photoresist, after which the photoresist is removed. Thereafter, the areas which are not protected with silicon nitride are oxidized. This oxide is cured with the help of oxygen or water vapor at high temperature. Finally, the remaining silicon nitride film is etched away with a suitable acid, such as phosphoric acid, which does not attack the oxide. The active components are then manufactured in the areas which are not covered by oxide, while the oxide provides insulation between the components.

När LOCOS-metoden används för kisel pa isolerande substrat kommer kanterna pa kiselomradena att täckas av den isole- rande oxiden. Man kan da ej odla den tunna styroxid som används för aktiva komponenter, t.ex. transistorer,pa kant- ytorna. Därigenom kommer ocksa den elektrod, styret, som kontrollerar strömmen genom transistorn att befinna sig längre ifran kanten. Kontrollen över strömmar i kanten blir da sämre. Detta ger upphov till läckströmmar i komponenten, speciellt om den utsätts för joniserande stralning. Talighet mot joniserande stralning är viktig för manga komponenter vilka tillverkas i kisel pa isolerande substrat eftersom dessa komponenter ofta är avsedda att användas i sadan miljö.When the LOCOS method is used for silicon on insulating substrates, the edges of the silicon areas will be covered by the insulating oxide. It is then not possible to grow the thin styrene oxide used for active components, e.g. transistors, on the edge surfaces. As a result, the electrode, the gate, which controls the current through the transistor, will also be further away from the edge. The control over currents at the edge then becomes worse. This gives rise to leakage currents in the component, especially if it is exposed to ionizing radiation. Resistance to ionizing radiation is important for many components which are made of silicon on insulating substrates as these components are often intended for use in such an environment.

UPPFINNINGEN Framställning av integrerade kretsar pa en skiva innefat- tande ett elektriskt isolerande substrat belagd med en kiselfilm ur vilken kiselomraden frametsas enligt uppfinningen genom att 10 15 20 25 30 35 501 079 - ytan pà kiselfilmen oxideías sä att ett tunt skikt kiseloxid bildas, - ett tunt skikt av kiselnitrid deponeras pà oxidskiktet, - en fotoresist pälägges med fotolitografiska metoder för att definiera skyddade resistomräden, - varefter nitriden etsas bort fràn de oskyddade omräden med ett etsmedel som avbryter etsningen dä det underliggande oxidskiktet näs medan kiselnitriden blir kvar pà de områden som täcks av fotoresist. - fotoresisten avlägsnas innan skivan utsattes för en oxida- tion där oskyddade omräden av kiselfilmen oxideras medan omräden belagda med kiselnitrid ej oxideras och ' - slutligen frilägges det underliggande isolerande substra- tet i de oxiderade områdena och pá detta substrat utetsade kiselomräden genom att oxid och nitrid samt eventuell i de oskyddade omrádena kvarlämnad kisel bortetsas.THE INVENTION Preparation of integrated circuits on a disk comprising an electrically insulating substrate coated with a silicon film from which the silicon areas are etched according to the invention by oxidizing the surface of the silicon film so that a thin layer of silicon oxide is formed, - a a thin layer of silicon nitride is deposited on the oxide layer, - a photoresist is applied by photolithographic methods to define protected resistome regions, - after which the nitride is etched away from the unprotected areas with an etchant which interrupts the etching when the underlying oxide layer is reached. of photoresist. the photoresist is removed before the disk is subjected to an oxidation in which unprotected areas of the silicon film are oxidized while areas coated with silicon nitride are not oxidized and '- finally the underlying insulating substrate is exposed in the oxidized areas and on this substrate etched silicon nitrides and any silicon left in the unprotected areas is etched away.

När oskyddade omräden av kiselfilmen oxideras kan oxidatio- nen tillätas fortgä till dess att kiselfilmen har oxiderats ända ned till det underliggande substratet.When unprotected areas of the silicon film are oxidized, the oxidation can be allowed to continue until the silicon film has been oxidized all the way down to the underlying substrate.

I en föredragen utföringsform av uppfinningen avbrytes dock oxidationen innan det isolerande substratet natts varefter den reserande kiseloxidfilmen avlägsnas frän dessa omräden medelst etsning, företrädesvis plasma-etsning, vilket ökar möjligheterna att kontrollera kiselkanternas avrundning.However, in a preferred embodiment of the invention, the oxidation is stopped before the insulating substrate is wetted, after which the remaining silica film is removed from these areas by etching, preferably plasma etching, which increases the possibilities of controlling the rounding of the silicon edges.

Med den uppfunna metoden erhälles de önskade kiselomrädena pä det isolerande substratet utan mellanliggande kiseloxid omräden och med mer avrundade kanter än om man direktetsar med plasmaetsning eller vätetsning.With the invented method, the desired silicon areas are obtained on the insulating substrate without intermediate silicon oxide areas and with more rounded edges than if one directly etches with plasma etching or hydrogen etching.

FIGURER Uppfinningen beskives i det följande mer ingäende med hänvisning till bifogade figurer.FIGURES The invention is described in more detail below with reference to the accompanying figures.

Claims (3)

10 15 20 25 30 35 501 079m FIGURBESKRIVNING Den uppfunna processen för att framställa integrerade kret- sar utgäende fran en skiva vilken bestär av ett elektriskt isolerande substrat 10 belagt med en tunn kiselfim visas i figurerna la, lb och lc. vid den uppfunna processen oxideras ytan pä en kiselfilm 11 vilken ligger pà ett isolerande sub- strat 10 sa som visas i figur la för att bilda ett tunt skikt av kiseloxid 12 varefter ett skikt 13 av kiselnitrid palägges oxidskiktet. Slutligen appliceras en fotoresist 14 med fotolitografiska metoder för att definera resistomràden. Därefter etsas nitriden 13 bort frän de omräden vilka ej täckes av fotoresist 14. Denna etsning avbryts dä man när det underliggande oxidskiktet 12. Fotoresisten 14 avlägsnas och skivan införs i en oxiderande miljö, företrädesvis förs den in i en oxidationsugn där kiselfilmen 11 oxideras. De omràden av kiselfilmen 11a som täcks av kiselnitrid 13 kommer ej att oxideras som visas i figur lb medan den övriga kiselfilmen oxideras. Oxidation kan fortgá ned till underliggande substrat 10 men även enligt i en föredragen utföringsform av den uppfunna metoden avbrytas innan oxidationen nätt det underliggande isolerande substratet 10. Därefter avlägsnas bade den kvarvarande nitriden 13 och den i de olika oxidationsstegen bildade oxiden 12 med ett etsmedel vilket ej angriper kisel. Vid oxidation enligt den föredragna utföringsformen av uppfinningen avlägsnas därefter det kvarvarande resterna av kiselfilm frän de oskyddade omräden medelst etsning företrädesvis plasma- etsning. Slutresultat blir kiselomräden llb med de önskade avrundade kanterna pä det isolerade substratet. PATENTKRAVDESCRIPTION OF THE DRAWINGS The invented process for producing integrated circuits starting from a disk which consists of an electrically insulating substrate 10 coated with a thin silicon film is shown in Figures 1a, 1b and 1c. in the invented process, the surface of a silicon film 11 which lies on an insulating substrate 10 as shown in Fig. 1a is oxidized to form a thin layer of silicon oxide 12, after which a layer 13 of silicon nitride is applied to the oxide layer. Finally, a photoresist 14 with photolithographic methods is applied to define the resist areas. Thereafter, the nitride 13 is etched away from the areas not covered by photoresist 14. This etching is interrupted when the underlying oxide layer 12. The photoresist 14 is removed and the wafer is introduced into an oxidizing environment, preferably it is introduced into an oxidation furnace where the silicon film 11 is oxidized. The areas of the silicon film 11a covered by silicon nitride 13 will not be oxidized as shown in Figure 1b while the rest of the silicon film is oxidized. Oxidation can continue down to the underlying substrate 10 but also according to a preferred embodiment of the invented method is interrupted before the oxidation reaches the underlying insulating substrate 10. Thereafter both the remaining nitride 13 and the oxide 12 formed in the various oxidation steps are removed with an etchant which is not attacker silicon. In oxidation according to the preferred embodiment of the invention, the remaining residues of silicon film are then removed from the unprotected areas by etching, preferably plasma etching. The end result is silicon areas 11b with the desired rounded edges of the insulated substrate. PATENT REQUIREMENTS 1. Sätt att framställa integrerade kretsar pä en skiva. vilken ätminstone innefattar ett isolerande substrat (10) belagt med en kiselfilm (11) varvid kiselomräden (llb) frametsas ur en pà den pä det isolerande substratet pälagda 10 15 20 25 30 35 5 S01 079 kiselfilmen genom en process, k ä n n e t e c k n a d a v, att - ytan pà kiselfilmen oxideras sà att ett tunt skikt kiseloxid (12) bildas. - ett tunt skikt av kiselnitrid tet, - en fotoresist pálàgges (14) och mönstras med fotolitogra- (13) deponeras pà oxidskik- fiska metoder för att definiera skyddade resistomràden, - varefter nitriden etsas bort fràn oskyddade omráden med ett etsmedel som avbryter etsningen da det underliggande oxidskiktet nas medan kiselnitriden blir kvar pà de omraden som täcks av fotoresist, - fotoresisten avlägsnas innan skivan utsattes för en oxida- tion där oskyddade omràden av kiselfilmen oxideras medan med (lla) - slutligen frilägges det underliggande isolerande substra- kiselnitrid belagda omraden ej oxideras och tet i de oxiderade omràdena och pá detta substrat utetsade kiselomràden genom att oxid och nitrid samt eventuell i de oskyddade omràdena kvarlämnad kisel bortetsas.1. Way to produce integrated circuits on a disk. which at least comprises an insulating substrate (10) coated with a silicon film (11), silicon areas (11b) being etched from a silicon film deposited on the insulating substrate on the insulating substrate by a process, characterized in that - the surface of the silicon film is oxidized so that a thin layer of silicon oxide (12) is formed. a thin layer of silicon nitride, - a photoresist is applied (14) and patterned by photolithography (13) deposited on oxide layered methods to define protected resist areas, - after which the nitride is etched away from unprotected areas with an etchant which interrupts the etching. the underlying oxide layer is retained while the silicon nitride remains in the areas covered by photoresist, - the photoresist is removed before the disk is subjected to an oxidation in which unprotected areas of the silicon film are oxidized while ( oxidized and the tet in the oxidized areas and on this substrate silicon areas were etched out by etching away oxide and nitride and any silicon left in the unprotected areas. 2. Sätt enligt patentkrav l, k ä n n e t e c k n a t a V, att oskyddade omraden av kiselfilmen oxideras ned till underliggande isolerande substrat (10) varefter oxid och nitrid bortetsas, med ett etsmedel som ej angriper kisel, för att frilägga det underliggande isolerande substratet och pa detta substrat utetsade kiselomráden.2. A method according to claim 1, characterized in that the unprotected areas of the silicon film are oxidized down to the underlying insulating substrate (10) after which oxide and nitride are etched away, with a non-attacking silicon etchant, to expose the underlying insulating substrate and thereon substrate uncut silicon areas. 3. Sätt enligt patentkrav 1, k ä n n e t e c k n a t a v, att oxidationen av kiselfilmens oskyddade omraden avbrytes (10) nas, varvid en resterande kiselfilm kvarlämnas pà det (10). i ett senare skede, innan det underliggande isolerande substratet nämnda kvarlämnade bort, företrädesvis medelst plasma-etsning för att frilágga det underliggande isolerande substratet resterande kiselfilm etsas, underliggande isolerande substratet.3. A method according to claim 1, characterized in that the oxidation of the unprotected areas of the silicon film is interrupted (10), leaving a remaining silicon film on it (10). at a later stage, before the underlying insulating substrate is left out, preferably by plasma etching to expose the underlying insulating substrate, the remaining silicon film is etched, the underlying insulating substrate.
SE9301246A 1993-04-16 1993-04-16 Method for etching silicon areas on insulating substrates SE501079C2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
SE9301246A SE501079C2 (en) 1993-04-16 1993-04-16 Method for etching silicon areas on insulating substrates
PCT/SE1994/000310 WO1994024695A1 (en) 1993-04-16 1994-04-08 Method for etching of silicon regions on insulating substrates

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE9301246A SE501079C2 (en) 1993-04-16 1993-04-16 Method for etching silicon areas on insulating substrates

Publications (3)

Publication Number Publication Date
SE9301246D0 SE9301246D0 (en) 1993-04-16
SE9301246L SE9301246L (en) 1994-10-17
SE501079C2 true SE501079C2 (en) 1994-11-07

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Application Number Title Priority Date Filing Date
SE9301246A SE501079C2 (en) 1993-04-16 1993-04-16 Method for etching silicon areas on insulating substrates

Country Status (2)

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SE (1) SE501079C2 (en)
WO (1) WO1994024695A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19703844A1 (en) * 1997-02-01 1998-08-06 Arcon Flachglasveredlungsgesel Proximity sensor or touch switch or break switch or the like

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE356167B (en) * 1970-01-15 1973-05-14 Philips Nv
NL8004005A (en) * 1980-07-11 1982-02-01 Philips Nv METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE
EP0313683A1 (en) * 1987-10-30 1989-05-03 International Business Machines Corporation Method for fabricating a semiconductor integrated circuit structure having a submicrometer length device element
JPH04127433A (en) * 1990-09-18 1992-04-28 Sharp Corp Formation of semiconductor element isolation region

Also Published As

Publication number Publication date
SE9301246D0 (en) 1993-04-16
SE9301246L (en) 1994-10-17
WO1994024695A1 (en) 1994-10-27

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