SE414556B - Anordning for identifiering av ett felaktigt bitplan vid ett flertal bitplan, som er anordnade i form av en matris i ett halvledarminne - Google Patents

Anordning for identifiering av ett felaktigt bitplan vid ett flertal bitplan, som er anordnade i form av en matris i ett halvledarminne

Info

Publication number
SE414556B
SE414556B SE7507670A SE7507670A SE414556B SE 414556 B SE414556 B SE 414556B SE 7507670 A SE7507670 A SE 7507670A SE 7507670 A SE7507670 A SE 7507670A SE 414556 B SE414556 B SE 414556B
Authority
SE
Sweden
Prior art keywords
bitplan
wrong
organized
matrix
identification
Prior art date
Application number
SE7507670A
Other languages
English (en)
Swedish (sv)
Other versions
SE7507670L (sv
Inventor
R J Petschauer
Original Assignee
Sperry Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US486033A external-priority patent/US3906200A/en
Application filed by Sperry Corp filed Critical Sperry Corp
Publication of SE7507670L publication Critical patent/SE7507670L/xx
Publication of SE414556B publication Critical patent/SE414556B/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
    • G06F11/076—Error or fault detection not based on redundancy by exceeding limits by exceeding a count or rate limit, e.g. word- or bit count limit
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/073—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a memory management context, e.g. virtual memory or cache management
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0766—Error or fault reporting or storing
    • G06F11/0772—Means for error signaling, e.g. using interrupts, exception flags, dedicated error registers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0766—Error or fault reporting or storing
    • G06F11/0781—Error filtering or prioritizing based on a policy defined by the user or on a policy defined by a hardware/software module, e.g. according to a severity level
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0766—Error or fault reporting or storing
    • G06F11/0787—Storage of error reports, e.g. persistent data storage, storage using memory protection

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Debugging And Monitoring (AREA)
SE7507670A 1974-07-05 1975-07-03 Anordning for identifiering av ett felaktigt bitplan vid ett flertal bitplan, som er anordnade i form av en matris i ett halvledarminne SE414556B (sv)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US486033A US3906200A (en) 1974-07-05 1974-07-05 Error logging in semiconductor storage units
US05/563,419 US3999051A (en) 1974-07-05 1975-03-28 Error logging in semiconductor storage units

Publications (2)

Publication Number Publication Date
SE7507670L SE7507670L (sv) 1976-01-07
SE414556B true SE414556B (sv) 1980-08-04

Family

ID=27048551

Family Applications (1)

Application Number Title Priority Date Filing Date
SE7507670A SE414556B (sv) 1974-07-05 1975-07-03 Anordning for identifiering av ett felaktigt bitplan vid ett flertal bitplan, som er anordnade i form av en matris i ett halvledarminne

Country Status (10)

Country Link
US (1) US3999051A (fr)
JP (1) JPS5936358B2 (fr)
CH (1) CH595676A5 (fr)
DE (1) DE2529152C3 (fr)
ES (1) ES439166A1 (fr)
FR (1) FR2277412A1 (fr)
GB (1) GB1518325A (fr)
IT (1) IT1039138B (fr)
NL (1) NL7508086A (fr)
SE (1) SE414556B (fr)

Families Citing this family (45)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3891969A (en) * 1974-09-03 1975-06-24 Sperry Rand Corp Syndrome logic checker for an error correcting code decoder
US4333142A (en) * 1977-07-22 1982-06-01 Chesley Gilman D Self-configurable computer and memory system
US4209846A (en) * 1977-12-02 1980-06-24 Sperry Corporation Memory error logger which sorts transient errors from solid errors
US4223382A (en) * 1978-11-30 1980-09-16 Sperry Corporation Closed loop error correct
US4251863A (en) * 1979-03-15 1981-02-17 Sperry Corporation Apparatus for correction of memory errors
US4255808A (en) * 1979-04-19 1981-03-10 Sperry Corporation Hard or soft cell failure differentiator
DE2923564C2 (de) * 1979-06-11 1982-06-24 Siemens AG, 1000 Berlin und 8000 München Speicheranordnung mit einer Anzahl von Speicherbaugruppen
US4342084A (en) * 1980-08-11 1982-07-27 International Business Machines Corporation Main storage validation means
US4380067A (en) * 1981-04-15 1983-04-12 International Business Machines Corporation Error control in a hierarchical system
US4493081A (en) * 1981-06-26 1985-01-08 Computer Automation, Inc. Dynamic memory with error correction on refresh
US4460997A (en) * 1981-07-15 1984-07-17 Pacific Western Systems Inc. Memory tester having memory repair analysis capability
US4433414A (en) * 1981-09-30 1984-02-21 Fairchild Camera And Instrument Corporation Digital tester local memory data storage system
DE3176883D1 (en) * 1981-12-17 1988-10-27 Ibm Apparatus for high speed fault mapping of large memories
US4450559A (en) * 1981-12-24 1984-05-22 International Business Machines Corporation Memory system with selective assignment of spare locations
US4506364A (en) * 1982-09-30 1985-03-19 International Business Machines Corporation Memory address permutation apparatus
JPS59123058A (ja) * 1982-12-29 1984-07-16 Fujitsu Ltd マシンチエツク処理方式
JPS607549A (ja) * 1983-06-24 1985-01-16 Mitsubishi Electric Corp 故障診断装置
JPS6038751A (ja) * 1983-08-11 1985-02-28 Toshiba Corp ビデオテ−プレコ−ダのトラツキング装置
US4584681A (en) * 1983-09-02 1986-04-22 International Business Machines Corporation Memory correction scheme using spare arrays
US4586178A (en) * 1983-10-06 1986-04-29 Eaton Corporation High speed redundancy processor
US4782486A (en) * 1987-05-14 1988-11-01 Digital Equipment Corporation Self-testing memory
US4980850A (en) * 1987-05-14 1990-12-25 Digital Equipment Corporation Automatic sizing memory system with multiplexed configuration signals at memory modules
US4782487A (en) * 1987-05-15 1988-11-01 Digital Equipment Corporation Memory test method and apparatus
US4918693A (en) * 1988-01-28 1990-04-17 Prime Computer, Inc. Apparatus for physically locating faulty electrical components
US4964130A (en) * 1988-12-21 1990-10-16 Bull Hn Information Systems Inc. System for determining status of errors in a memory subsystem
US5392292A (en) * 1991-06-27 1995-02-21 Cray Research, Inc. Configurable spare memory chips
US6222762B1 (en) 1992-01-14 2001-04-24 Sandisk Corporation Multi-state memory
KR100243314B1 (ko) * 1995-04-07 2000-02-01 윤종용 임시 디펙트 리스트를 이용한 에러 로그 방법
US5917724A (en) * 1997-12-20 1999-06-29 Ncr Corporation Method for predicting disk drive failure by monitoring the rate of growth of defects within a disk drive
US7346812B1 (en) * 2000-04-27 2008-03-18 Hewlett-Packard Development Company, L.P. Apparatus and method for implementing programmable levels of error severity
DE10137332B4 (de) * 2001-07-31 2014-11-06 Qimonda Ag Verfahren und Anordnung zur Ausgabe von Fehlerinformationen aus Halbleitereinrichtungen
US6976197B2 (en) * 2001-10-25 2005-12-13 International Business Machines Corporation Apparatus and method for error logging on a memory module
US7266726B1 (en) * 2003-11-24 2007-09-04 Time Warner Cable Inc. Methods and apparatus for event logging in an information network
US8302111B2 (en) 2003-11-24 2012-10-30 Time Warner Cable Inc. Methods and apparatus for hardware registration in a network device
US9213538B1 (en) 2004-02-06 2015-12-15 Time Warner Cable Enterprises Llc Methods and apparatus for display element management in an information network
US8078669B2 (en) 2004-02-18 2011-12-13 Time Warner Cable Inc. Media extension apparatus and methods for use in an information network
US7330882B2 (en) * 2005-12-28 2008-02-12 Matsushita Electric Works, Ltd. Systems and methods for discovering and interacting with services
US7590913B2 (en) * 2005-12-29 2009-09-15 Intel Corporation Method and apparatus of reporting memory bit correction
US7624323B2 (en) * 2006-10-31 2009-11-24 Hewlett-Packard Development Company, L.P. Method and apparatus for testing an IC device based on relative timing of test signals
US8370818B2 (en) 2006-12-02 2013-02-05 Time Warner Cable Inc. Methods and apparatus for analyzing software interface usage
US10579458B2 (en) 2015-11-13 2020-03-03 Sandisk Technologies Llc Data logger
US11716558B2 (en) 2018-04-16 2023-08-01 Charter Communications Operating, Llc Apparatus and methods for integrated high-capacity data and wireless network services
WO2020077346A1 (fr) 2018-10-12 2020-04-16 Charter Communications Operating, Llc Appareil et procédés d'identification de cellules dans des réseaux sans fil
US11129171B2 (en) 2019-02-27 2021-09-21 Charter Communications Operating, Llc Methods and apparatus for wireless signal maximization and management in a quasi-licensed wireless system
US11026205B2 (en) 2019-10-23 2021-06-01 Charter Communications Operating, Llc Methods and apparatus for device registration in a quasi-licensed wireless system

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3350690A (en) * 1964-02-25 1967-10-31 Ibm Automatic data correction for batchfabricated memories
US3659088A (en) * 1970-08-06 1972-04-25 Cogar Corp Method for indicating memory chip failure modes
US3704363A (en) * 1971-06-09 1972-11-28 Ibm Statistical and environmental data logging system for data processing storage subsystem
US3735105A (en) * 1971-06-11 1973-05-22 Ibm Error correcting system and method for monolithic memories
DE2134529A1 (de) * 1971-07-10 1973-01-25 Ibm Deutschland Verfahren zur fehlererkennung und -korrektur in aus dem speicher einer programmgesteuerten datenverarbeitungsanlage ausgelesenen informationswoertern
US3803560A (en) * 1973-01-03 1974-04-09 Honeywell Inf Systems Technique for detecting memory failures and to provide for automatically for reconfiguration of the memory modules of a memory system
US3898443A (en) * 1973-10-29 1975-08-05 Bell Telephone Labor Inc Memory fault correction system
US3872291A (en) * 1974-03-26 1975-03-18 Honeywell Inf Systems Field repairable memory subsystem
US3893071A (en) * 1974-08-19 1975-07-01 Ibm Multi level error correction system for high density memory

Also Published As

Publication number Publication date
GB1518325A (en) 1978-07-19
NL7508086A (nl) 1976-01-07
DE2529152B2 (de) 1977-10-20
USB563419I5 (fr) 1976-03-23
SE7507670L (sv) 1976-01-07
IT1039138B (it) 1979-12-10
FR2277412B1 (fr) 1982-07-09
DE2529152A1 (de) 1976-01-29
DE2529152C3 (de) 1982-04-29
ES439166A1 (es) 1977-07-01
JPS5131138A (fr) 1976-03-17
JPS5936358B2 (ja) 1984-09-03
CH595676A5 (fr) 1978-02-15
FR2277412A1 (fr) 1976-01-30
US3999051A (en) 1976-12-21

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