RU93005211A - Отказоустойчивая вычислительная система и способ ее формирования - Google Patents

Отказоустойчивая вычислительная система и способ ее формирования

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Publication number
RU93005211A
RU93005211A RU93005211/09A RU93005211A RU93005211A RU 93005211 A RU93005211 A RU 93005211A RU 93005211/09 A RU93005211/09 A RU 93005211/09A RU 93005211 A RU93005211 A RU 93005211A RU 93005211 A RU93005211 A RU 93005211A
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RU
Russia
Prior art keywords
machine
processing means
state
message
computing system
Prior art date
Application number
RU93005211/09A
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English (en)
Other versions
RU2108621C1 (ru
Inventor
Мейджор Дрю
Пауэлл Кайл
Нейбаур Дейл
Original Assignee
Новелл, Инк.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US07/586,807 external-priority patent/US5157663A/en
Application filed by Новелл, Инк. filed Critical Новелл, Инк.
Publication of RU93005211A publication Critical patent/RU93005211A/ru
Application granted granted Critical
Publication of RU2108621C1 publication Critical patent/RU2108621C1/ru

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Claims (16)

1. Способ формирования отказоустойчивой вычислительной системы, включающий этапы создания первого средства обработки для работы вычислительной системы, включающего первую машину операционной системы (ОС) и первую машину ввода/ вывода (В/В) ; создания второго средства обработки для работы вычислительной системы, включающего вторую машину операционной системы (ОС) и вторую машину ввода/вывода (В/В) ; определения состояния первых средств обработки и обеспечения передачи состояния во вторые средства обработки, определения операций, которые могут изменить состояние первой машины ОС как события, передачи каждого события в первую машину В/В и преобразования каждого из событий в сообщение, отличающийся тем, что предусматривает этапы передачи каждого сообщения, в первую очередь сообщений первой машины ОС и во вторую очередь сообщений второй машины ОС, исполнения сообщения в первой машине ОС и во второй машине ОС таким образом, что состояние первой и второй машин ОС оставляют по существу идентичным.
2. Способ по п. 1, отличающийся тем, что включает этапы передачи каждого события во вторую машину В/В, когда первые средства обработки не работают; преобразования события в сообщение во вторичной машине В/В; передачи сообщения во вторичную очередь сообщений во вторичной машине ОС для исполнения второй машиной ОС.
3. Способ по п. 1, отличающийся тем, что этапы определения состояния первых средств обработки и передачи состояния во вторые средства обработки, включающий этапы: исполнения первой машиной ОС любых сообщений, доступных первой машине ОС, до тех пор, пока первая машина ОС не переходит в стабильное состояние, и передачи образа памяти первой машины ОС через первую машину В/В во вторичные средства обработки.
4. Способ по п. 1, отличающийся тем, что первые средства обработки включают по крайней мере один процессор.
5. Способ по п. 1, отличающийся тем, что вторые средства обработки включают по крайней мере один процессор.
6. Способ по п. 1, отличающийся тем, что включает этапы: генерации запроса в машину ОС, т.е. запроса для выполнения операции ввода/вывода, передачи запроса в первую очередь запросов первой машине В/В для исполнения первой машиной В/В ; генерации ответа в первую машину ОС для индикации исполнения указанного запроса.
7. Способ по п. 1, отличающийся тем, что событие является асинхронным.
8. Отказоустойчивая вычислительная система, включающая первые средства обработки для работы этой вычислительной системы, которые включают первую машину операционной системы (ОС) и первую машину ввода/ вывода, вторые средства обработки для работы вычислительной системы, которые включают в себя вторую машину операционной системы (ОС) и вторую машину ввода/вывода (В/В) , причем первая машина ОС и вторая машина ОС имеют по существу идентичное состояние, первая машина В/В связана со второй машиной В/В через первую машину, первая машина В/В выполнена с возможностью преобразования операции, которые могут изменять состояние первой машины ОС в сообщение, отличающаяся тем, что первая машина В/В выполнена с возможностью передачи сообщения в первую очередь сообщений первой машины ОС и во вторую очередь сообщений второй машины ОС, первая и вторая машины ОС выполнены с возможностью исполнять сообщение таким образом, что состояние, а также первая и вторая машины ОС по существу остаются идентичными.
9. Система по п. 8, отличающаяся тем, что первое средство обработки включает по крайней мере один процессор.
10. Система по п. 8, отличающаяся тем, что второе средство обработки включает по крайней мере один процессор.
11. Система по п. 8, отличающаяся тем, что включает первые средства хранения, связанные с первыми средствами обработки, причем первые средства хранения выполнены с возможностью запоминания образа памяти, соответствующего состоянию первой машины ОС.
12. Система по п. 11, отличающаяся тем, что включает вторые средства хранения, связанные со вторыми средствами обработки, с возможностью запоминания образа памяти, соответствующего состоянию второй машины ОС.
13. Система по п. 8, отличающаяся тем, что первая машина ОС выполнена с возможностью управления исполнением инструкций вычислительной системы.
14. Система по п. 8, отличающаяся тем, что машина В/В выполнена с возможностью управления связью с входными и выходными устройствами.
15. Система по п. 13, отличающаяся тем, что вторая машина ОС выполнена с возможностью управления исполнением инструкций вычислительной системы, когда первая машина ОС не может исполнить инструкции.
16. Система по п. 8, отличающаяся тем, что сообщение включает синхронные и асинхронные события.
RU93005211A 1990-09-24 1991-08-09 Отказоустойчивая вычислительная система и способ ее формирования RU2108621C1 (ru)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US586,807 1990-09-24
US07/586,807 US5157663A (en) 1990-09-24 1990-09-24 Fault tolerant computer system
PCT/US1991/005679 WO1992005487A1 (en) 1990-09-24 1991-08-09 Fault tolerant computer system

Publications (2)

Publication Number Publication Date
RU93005211A true RU93005211A (ru) 1997-12-20
RU2108621C1 RU2108621C1 (ru) 1998-04-10

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US (2) US5157663A (ru)
EP (1) EP0550457B1 (ru)
JP (1) JP3156083B2 (ru)
KR (1) KR0137406B1 (ru)
AT (1) ATE152261T1 (ru)
AU (1) AU660939B2 (ru)
BR (1) BR9106875A (ru)
CA (1) CA2091993C (ru)
DE (1) DE69125840T2 (ru)
FI (1) FI101432B1 (ru)
NO (1) NO302986B1 (ru)
RU (1) RU2108621C1 (ru)
WO (1) WO1992005487A1 (ru)

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