RU2732583C1 - Low-temperature operational amplifier with high attenuation of input in-phase signal on complementary field-effect transistors with control p-n junction - Google Patents

Abstract

FIELD: radio engineering; analogue microelectronics.SUBSTANCE: amplifier comprises input field-effect transistors with combined sources, current mirrors, additional field-effect transistor, auxiliary resistor, additional current input connected to the gate of the first additional field-effect transistor.EFFECT: technical result consists in improvement of coefficient of attenuation of input in-phase signals of OA for operation at low temperatures, having a significant effect on errors of classical analogue interfaces.1 cl, 8 dwg

Description

The invention relates to the field of radio engineering and analog microelectronics and can be used in analog and analog-digital interfaces for processing sensor signals operating in conditions of common mode noise.

In modern electronic equipment, differential operational amplifiers (OA) with significantly different parameters are used. A special place is occupied by op amps based on complementary input stages (the so-called dual-input-stages), two current mirrors matched to the buses of positive and negative power supplies, and a buffer amplifier [1-31]. Op-amps of this class are implemented both on bipolar and CMOS transistors. This OS architecture [1-31] is the basis for more than 50 serial microcircuits produced by the world's leading microelectronic firms.

One of the important dynamic parameters of modern operational amplifiers is the attenuation coefficient of the input common-mode signal (K _os.sf ), which has a significant effect on the limiting accuracy parameters of many options for constructing analog interfaces operating in conditions of common-mode noise.

The closest prototype (Fig. 1) of the claimed device is an op-amp according to patent application US 2006/0125522, fig.1a, fig.3, 2006. It contains the first 1 and second 2 inputs of the device, the main output 3 of the device, the first 4 and second 5 input field-effect transistors with combined sources, the third 6 and fourth 7 input field-effect transistors with combined sources, the first 8 reference current source associated with the combined sources of the first 4 and the second 5 input field-effect transistors, the second 9 reference current source associated with the combined sources of the third 6 and fourth 7 input field-effect transistors, the first 10 current mirror matched with the first 11 power supply bus, the second 12 current mirror matched with the second 13 power supply bus , and the first 1 input of the device is connected to the gates of the first 4 and third 6 input field-effect transistors, the second 2 input of the device is connected to the gates of the second 5 and fourth 7 input field-effect transistors, the drain of the second 5 input field-effect transistor is connected to the main input 14 of the first 10 current mirror, the drain of the fourth 7 input field-effect transistor is connected to o the main input 15 of the second 12 current mirror, the outputs of the first 10 and second 12 current mirrors are combined and connected to the main output 3 of the device, the drain of the first 4 input field-effect transistor is matched with the first 11 bus by the power supplies, and the drain of the third 6 input field-effect transistor is matched with the second 13 power supply bus.

A significant drawback of the known op-amp is that when it is practically implemented on the basis of complementary field-effect transistors with a control pn junction, it does not provide increased values of K _os.sf in the low temperature range. This is due to the fact that in the OA prototype circuit, its K _os.sf is significantly influenced by the output resistances of the first 8 (r _i8 ) and second 9 (r _i9 ) reference current sources, which create parasitic channels for transmitting the input common-mode signal to the device output 3. If the transmission through these channels is minimized, then K _os.sf OS will increase significantly.

The main object of the proposed invention is to improve the attenuation of the input common-mode signals of the op amp at low temperatures.

The problem is solved by the fact that in the operational amplifier of FIG. 1, containing the first 1 and second 2 inputs of the device, the main output 3 of the device, the first 4 and second 5 input field-effect transistors with combined sources, the third 6 and fourth 7 input field-effect transistors with combined sources, the first 8 reference current source associated with the combined sources the first 4 and second 5 input field-effect transistors, the second 9 is a reference current source associated with the combined sources of the third 6 and fourth 7 input field-effect transistors, the first 10 current mirror is matched with the first 11 bus of the power source, the second 12 is a current mirror that is matched with the second 13 bus of the source power supply, and the first 1 input of the device is connected to the gates of the first 4 and third 6 input field-effect transistors, the second 2 input of the device is connected to the gates of the second 5 and fourth 7 input field-effect transistors, the drain of the second 5 input field-effect transistor is connected to the main input 14 of the first 10 current mirror , the drain of the fourth 7 input field-effect transistor is connected to the main input 15 of the second 12 current mirror, the outputs of the first 10 and second 12 current mirrors are combined and connected to the main output 3 of the device, the drain of the first 4 input field-effect transistor is matched with the first 11 bus by the power supplies, and the drain of the third 6 input field-effect transistor is matched with the second 13 the power supply bus, new elements and connections are provided - the first 8 reference current source is implemented on the basis of the first 16 additional field-effect transistor, the source of which is connected to the gate of the first 16 additional field-effect transistor through the first auxiliary resistor 17, and the drain is connected to the combined sources of the first 4 and second 5 input field-effect transistors, the second 9 reference current source is implemented on the basis of the second 18 additional field-effect transistor, the source of which is connected to the gate of the second 18 additional field-effect transistor through the second auxiliary resistor 19, and the drain is connected to the combined sources of the third 6 and fourth 7 input field-effect transistors, and in the first 10 current mirror there is an additional current input 20 connected to the gate of the second 18 additional field-effect transistor, and in the second 12 current mirror there is an additional current input 21 connected to the gate of the first 16 additional field-effect transistor.

In the drawing, FIG. 1 shows a schematic diagram of a prototype operational amplifier.

In the drawing, FIG. 2 shows a diagram of the claimed device in accordance with claim 1 and claim 2 of the claims.

In the drawing, FIG. 3 shows the static mode of the op amp of FIG. 2 for the case corresponding to the implementation in this more general scheme of the properties of the op-amp prototype of FIG. 1 due to the appropriate choice of the transmission coefficients of the current mirrors 10 and 12 (K _i1.1 = -1, K _i1.2 = 0; K _i2.1 = -1, K _i2.2 = 0): LTSpice modeling environment on models of integral transistors of JSC "Integral" (Minsk) [32] at t = 27 ° C, R1 = 10kOhm, R2 = 15kOhm.

In the drawing, FIG. 4 shows the static mode of the claimed OA of FIG. 2 in the LTSpice modeling environment on models of integral transistors of JSC "Integral" (Minsk) at a temperature at t = 27 ° C, R1 = 10kΩ, R2 = 15kΩ and current mirror transmission coefficients of 10 and 12 K _i1.1 = -1, K _i1.2 = -0.5; K _i2.1 = -1, K _i2.2 = -0.5, corresponding to claim 2 of the claims.

In the drawing, FIG. 5 shows a comparison of the frequency dependence of the transmission slope of the input in-phase signal g _m = i _out / u _{c of the} claimed op-amp of FIG. 4 (solid lines) and the prototype DT of FIG. 3 (dotted lines) at room temperature t = 27 ° C.

In the drawing, FIG. 6 shows the static mode of the op amp of FIG. 2 at
t = -197 ° C for the case corresponding to the implementation in this more general scheme of the properties of the op-amp prototype of FIG. 1 due to the appropriate choice of the transmission coefficients of the first 10 and second 12 current mirrors (K _i1.1 = -1, K _i1.2 = 0; K _i2.1 = -1, K _i2.2 = 0): the LTSpice simulation environment on models of integral transistors of JSC "Integral" (Minsk) with R1 = 10kOhm, R2 = 15kOhm.

In the drawing, FIG. 7 shows the static mode of the claimed OA of FIG. 2 for t = -197 ° C in the LTSpice simulation environment on models of integral transistors of JSC "Integral" (Minsk) [32] at R1 = 10kΩ, R2 = 15kΩ and the transfer coefficients of the first 10 and second 12 current mirrors К _i1.1 = -1, K _i1.2 = -0.5; K _i2.1 = -1, K _i2.2 = -0.5, corresponding to claim 2 of the claims.

In the drawing, FIG. 8 shows a comparison of the frequency dependence of the transmission slope g _{m of the} input in-phase signal of the inventive op-amp of FIG. 7 (solid lines) and the prototype DT of FIG. 6 (dotted lines) at cryogenic temperatures (t = -197 ° C).

Low-temperature operational amplifier with increased attenuation of the input common-mode signal on complementary field-effect transistors with a control pn junction FIG. 2 contains the first 1 and second 2 inputs of the device, the main output 3 of the device, the first 4 and second 5 input field-effect transistors with combined sources, the third 6 and fourth 7 input field-effect transistors with combined sources, the first 8 reference current source associated with the combined sources of the first 4 and second 5 input field-effect transistors, the second 9 reference current source associated with the combined sources of the third 6 and fourth 7 input field-effect transistors, the first 10 current mirror matched with the first 11 bus of the power source, the second 12 current mirror matched with the second 13 bus of the source power supply, and the first 1 input of the device is connected to the gates of the first 4 and third 6 input field-effect transistors, the second 2 input of the device is connected to the gates of the second 5 and fourth 7 input field-effect transistors, the drain of the second 5 input field-effect transistor is connected to the main input 14 of the first 10 current mirror , the drain of the fourth 7 input field-effect transistor is connected to the os the new input 15 of the second 12 current mirror, the outputs of the first 10 and second 12 current mirrors are combined and connected to the main output 3 of the device, the drain of the first 4 input field-effect transistor is matched with the first 11 bus by power supplies, and the drain of the third 6 input field-effect transistor is matched with the second 13 power supply bus. The first 8 reference current source is implemented on the basis of the first 16 additional field-effect transistor, the source of which is connected to the gate of the first 16 additional field-effect transistor through the first auxiliary resistor 17, and the drain is connected to the combined sources of the first 4 and second 5 input field-effect transistors, the second 9 is a reference current source implemented on the basis of the second 18 additional field-effect transistor, the source of which is connected to the gate of the second 18 additional field-effect transistor through the second auxiliary resistor 19, and the drain is connected to the combined sources of the third 6 and fourth 7 input field-effect transistors, and an additional current input is provided in the first 10 current mirror 20, connected to the gate of the second 18 additional field-effect transistor, and in the second 12 current mirror, an additional current input 21 is provided, connected to the gate of the first 16 additional field-effect transistor. The bipolar 22 in the drawing of FIG. 2 simulates the properties of the load connected to the main output 3 of the device.

In particular cases, the inclusion of the claimed op-amp FIG. 2, for example, in op-amp circuits with a paraphase output, it can use additional current outputs 23 and 24 associated with the drains of the corresponding field-effect transistors 4 and 6 and matched with the first 11 and second 13 power supply buses. Additional current mirrors similar to the first 10 and second 12 current mirrors in the drawing of Fig. 2 can be connected to these outputs, which makes it possible to organize a paraphase output in such an op-amp circuit.

In the drawing, FIG. 2, in accordance with claim 2 of the claims, the current transfer ratios at the main input 14 of the first 10 current mirror are 2 times greater than the current transfer ratio at its additional current input 20, and the current transfer ratios at the main input 15 of the second 12 current the mirror is 2 times greater than the current transfer coefficient at its additional current input 21.

Consider the operation of the device according to FIG. 2.

A change in the input common-mode signal u _c = u _c1 = u _c2 leads to a change in the drain currents of the first 16 and second 18 additional field-effect transistors by the values 2i ₀₁ and 2i ₀₂ , which are transmitted to the main output 3 of the device through two additional compensating channels organized in the first 10 and the second 12 current mirrors. In this case, for the outputs of the first 10 and second 12 current mirrors and the load R _n in the circuit of FIG. 2 the following current ratios are valid

i out ₁₀ = K _i1.1 i ₀₁ -2K _i1.2 i ₀₂ , (1)

i out ₁₂ = 2K _i2.2 i ₀₁ -K _i2.1 i ₀₂ , (2)

i _n = i out ₁₀ - i out _12, (3)

where K _i1.1 , K _i1.2 , K _i2.2 , K _i2.1 - current transfer coefficients of the first 10 and second 12 current mirrors on the main 14 and 15, as well as additional 20 and 21 inputs;

i ₀₁ , i ₀₂ - increment of drain currents of the first 16 and second 18 additional field-effect transistors, due to the final values of their output resistances. Moreover

(4)

(4)

(5)

(five)

where R ₁₇ , R ₁₉ are the resistances of the first 17 and second 19 auxiliary resistors,

μ is the coefficient of internal feedback of field-effect transistors 16 and 18, taking into account the effect of voltage changes at the drains of these transistors on the displacement of their drain-gate characteristics at a constant drain current:

. (6)

... (6)

From equations (1) - (5) it follows that due to the choice of the transmission coefficients K _i1.1 = -1, K _i1.2 = -0.5, K _i2.2 = -0.5, K _i2.1 = -1, in the circuit of FIG. 2 provides zero conductivity of the transmission g _{cm of the} input common-mode signal u _c = u _c1 = u _c2 to the main output of device 3

As a result, K _os.sf OU FIG. 2 increases significantly, since:

, (7)

, (7)

where K _{d is the} transmission coefficient of the differential input signal of the op-amp FIG. 1 from inputs 1, 2 devices to main output 3;

K _с.сф - transmission coefficient of the input common-mode signal from inputs 1, 2 of the device u _c = u _c1 = u _c2 to the main output 3.

For the considered OA circuit

(8)

(8)

(9)

(nine)

(10)

(ten)

where S _d is the slope of the transmission of the input differential voltage u _in = u _c1 = u _c2 at the first 1 and second 2 inputs of the device to the main output 3 of the OS;

g _cm << S _d is the slope of the transmission of the input common-mode signal u _c = u _c1 = u _c2 to the main output 3 of the op amp.

Thus, as follows from formula (9), minimization of K _s.sf in the proposed device significantly increases its in-phase noise immunity (10). Consequently, the claimed op-amp has a significant advantage in terms of K _os.sf in comparison with the prototype op-amp.

BIBLIOGRAPHIC LIST

1. Patent application US 2006/0125522, fig.1a, fig.3, 2006

2. Patent application US 2005/0024140, fig. 12, 2005.

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32.O. V. Dvornikov, VL Dziatlau, NN Prokopenko, KO Petrosiants, NV Kozhukhov and VA Tchekhovski, "The accounting of the simultaneous exposure of the low temperatures and the penetrating radiation at the circuit simulation of the BiJFET analog interfaces of the sensors," 2017 International Siberian Conference on Control and Communications (SIBCON), Astana, 2017, pp. 1-6. DOI: 10.1109 / SIBCON.2017.7998507.

Claims (2)

1. Low-temperature operational amplifier with increased attenuation of the input in-phase signal on complementary field-effect transistors with a control pn junction, containing the first (1) and second (2) device inputs, the main output (3) of the device, the first (4) and second (5) input field-effect transistors with combined sources, the third (6) and fourth (7) input field-effect transistors with combined sources, the first (8) reference current source associated with the combined sources of the first (4) and second (5) input field-effect transistors, the second (9 ) a reference current source associated with the combined sources of the third (6) and fourth (7) input field-effect transistors, the first (10) current mirror matched with the first (11) power supply bus, the second (12) current mirror matched with the second ( 13) by the power supply bus, the first (1) input of the device is connected to the gates of the first (4) and third (6) input field-effect transistors, the second (2) input of the device is connected to the gates of the second (5) and fourth (7) input field-effect transistors, the drain of the second (5) input field-effect transistor is connected to the main input (14) of the first (10) current mirror, the drain of the fourth (7) input field-effect transistor is connected to the main input (15) of the second (12) current mirror, the outputs of the first (10) and second (12) current mirrors are combined and connected to the main output (3) of the device, the drain of the first (4) input field-effect transistor is matched to the first (11) bus by power supplies, and the drain of the third (6) the input field-effect transistor is matched to the second (13) power supply bus, characterized in that the first (8) reference current source is implemented on the basis of the first (16) additional field-effect transistor, the source of which is connected to the gate of the first (16) additional field-effect transistor through the first auxiliary resistor (17), and the drain is connected to the combined sources of the first (4) and second (5) input field-effect transistors, the second (9) reference current source is implemented based on the second (18) an additional field-effect transistor, the source of which is connected to the gate of the second (18) additional field-effect transistor through the second auxiliary resistor (19), and the drain is connected to the combined sources of the third (6) and fourth (7) input field-effect transistors, and in the first ( 10) the current mirror provides an additional current input (20) connected to the gate of the second (18) additional field-effect transistor, and the second (12) current mirror provides an additional current input (21) connected to the gate of the first (16) additional field-effect transistor. 2. Low-temperature operational amplifier according to claim 1, characterized in that the current transfer coefficients at the main input (14) of the first (10) current mirror are 2 times greater than the current transfer coefficient at its additional current input (20), and the transfer coefficients the current at the main input (15) of the second (12) current mirror is 2 times greater than the current transfer coefficient at its additional current input (21).

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