RU2515538C1 - Broadband amplifier based on common base (or common emitter) stage - Google Patents

Abstract

FIELD: radio engineering, communication.

SUBSTANCE: broadband amplifier based on a common base (or common emitter) stage comprises an input stage (1), the control input (2) of which is connected to a signal source (3), a collector load (4) two-terminal element, connected between the power supply (5) bus and the collector output (6) of the input stage (1), a parasitic capacitor (7), connected between the collector output (6) of the input stage (1) and the power supply common bus (8). The circuit includes a non-inverting buffer amplifier (9), the input of which is connected to the collector output (6) of the input stage (1), and the output (10) is the output of the device, and an additional transistor (11), the base of which is connected to an auxiliary voltage source (12), the collector is connected to the input of the non-inverting buffer amplifier (9), the emitter is connected through a current-stabilising two-terminal element (13) to the power supply common bus (8), wherein the output of the device (8) is connected to the emitter of the additional transistor (11) through an additional capacitor (14).

EFFECT: increasing the upper cut-off frequency of the broadband amplifier without deterioration of voltage gain in the operating frequency range.

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Description

The invention relates to the field of radio engineering and communication and can be used as a device for amplifying analog signals in the structure of analog microcircuits for various functional purposes, for example, in high-frequency amplifiers, comparators, signal converters, etc.

The basis of modern analog microelectronics are classical transistor cascades with a common base (OB) and a common emitter (OE) [1-57], which are part of the structure of many existing and developed circuits for frequency ranges 0 ÷ 250 GHz. In this case, the upper cutoff frequency f _in cascades with OB and OE (at the level of -3 dB) is determined mainly by the time constant formed by the parasitic capacitance on the substrate C _p and the collector-base capacitance C _{kb of the} output integrated transistor

$$f_{\mathrm{at}}\approx \frac{\mathrm{one}}{2\pi {\tau }_{\mathrm{at}}},\left(\mathrm{one}\right)$$

where τ _in ≈R _k (C _p + C _kb ),

R _to - equivalent resistance in the collector circuit of the output transistor of the cascade with OB (OE).

To increase the gain K _at the voltage, the resistance R _K must be chosen large, which reduces f _in . In classical OB and OE cascades, this contradiction is practically insoluble within the framework of well-known circuitry solutions.

Raising the f _{B of} classical transistor circuits is one of the central problems of modern microcircuitry. Its resolution is especially relevant for microcircuits with micron topological standards (0.6 ÷ 3 microns), since more than 70% of cheap microelectronic products are manufactured within the framework of these technologies.

Known methods for increasing f _in transistor cascades are discussed in patents of Analog Devices [US 5.434.446], STM Microelectronics [US 6.233.012]. However, they are not universal - their practical application is associated with the use of special technological processes and unique circuitry, which increases the cost of specific products. Thus, the technique proposed in US Pat. No. 5,434,446 to Analog Devices is applicable to dielectric insulation technology. For its implementation, for each transistor that determines the parameters of the control at high frequencies, it is necessary to have a broadband buffer amplifier with a small input capacitance.

The closest prototype of the claimed device is a classic broadband amplifier (SHU) on a cascade with a common base, described in patent US 5.933.057. It contains an input stage (1), the control input of which (2) is connected to a signal source (3), a two-terminal collector load (4) connected between the bus of the power source (5) and the collector output (6) of the input stage (1), parasitic a capacitor (7) connected between the collector output (6) of the input stage (1) and the common bus (8) of the power source.

A significant drawback of the SH-prototype is the relatively low values of the upper cutoff frequency f _in .

The main objective of the invention is to increase the upper cutoff frequency of the SHU without deteriorating the voltage gain in the working frequency range.

The problem is solved in that in the broadband amplifier of Fig. 1, containing an input stage 1, the control input of which 2 is connected to a signal source 3, a collector load 2-pole 4 connected between the bus of the power source 5 and the collector output 6 of the input stage 1, the parasitic capacitor 7 connected between the collector output 6 of the input stage 1 and the common bus 8 of the power source, new elements and connections are provided - a non-inverting buffer amplifier 9 is introduced into the circuit, the input of which is connected to the collector output 6 input cascade 1, and output 10 is the output of the device, and an additional transistor 11, the base of which is connected to the auxiliary voltage source 12, the collector is connected to the input of a non-inverting buffer amplifier 9, the emitter is connected through a current-stabilizing two-terminal 13 to a common bus of power supplies 8, and the output of the device 8 is connected to the emitter of an additional transistor 11 through an additional capacitor 14.

The drawing of figure 1 shows a functional diagram of a classic broadband amplifier prototype based on the input stage 1 with OB.

The drawing of figure 2 shows a diagram of the inventive device in accordance with claim 1 and claim 2 of the claims.

The drawing of figure 3 shows the circuit corresponding to claim 1 and claim 3 of the claims, in which the input stage 1 is implemented according to the scheme with a common emitter (OE).

The drawing of figure 4 shows a diagram of figure 3 in a Pspice environment on models of integrated transistors of FSUE NPP Pulsar.

The drawing of Fig. 5 shows the logarithmic amplitude-frequency characteristics (LFC) of the control circuit of Fig. 4 for various capacitances of the additional capacitor Cvar (C14 = Cvar).

The drawing of Fig.6 shows a diagram of Fig.2 in a Pspice environment on models of integrated transistors of FSUE NPP Pulsar.

The drawing of Fig.7 shows the logarithmic amplitude-frequency characteristics of the control circuit of Fig.6 for various capacitances of the additional capacitor 14 (Cvar = C14).

The broadband amplifier of figure 2 contains an input stage 1, the control input of which 2 is connected to a signal source 3, a two-terminal collector load 4 connected between the bus of the power source 5 and the collector output 6 of the input stage 1, a parasitic capacitor 7 connected between the collector output 6 of the input stage 1 and a common bus 8 of the power source. A non-inverting buffer amplifier 9 is introduced into the circuit, the input of which is connected to the collector output 6 of the input stage 1, and the output 10 is the output of the device, and an additional transistor 11, the base of which is connected to the auxiliary voltage source 12, the collector is connected to the input of the non-inverting buffer amplifier 9, emitter through a current-stabilizing two-terminal 13 is connected to a common bus of power sources 8, and the output of the device 8 is connected to the emitter of an additional transistor 11 through an additional capacitor 14.

The input stage 1 in the drawing of figure 2, in accordance with claim 2 of the claims, is implemented according to the scheme with a common base on the transistor 15 and the current-stabilizing two-terminal 16, and the signal source 3 contains a capacitor 17, a matching resistor 18 and an emf signal source 19.

In the drawing of figure 3, in accordance with paragraph 3 of the claims, the input stage 1 is implemented according to the scheme with a common emitter on the transistor 20, and the signal source 3 includes an EMF signal 21 and a constant bias source 22.

Consider the operation of the circuits of figure 1 and figure 2 in the high frequency range.

The integrated voltage gain of the SHU of figure 1 is determined by the well-known formula

$${\dot{K}}_{\mathrm{at}}=\frac{{\dot{U}}_{\mathrm{at}sx}}{{\dot{U}}_{\mathrm{at}x}}\approx \frac{K_0}{\mathrm{one}+j\omega R_{\mathrm{four}}{\mathrm{<figure-callout\; id="7"\; label="C"\; filenames="00000011.png,00000012.png"\; state="\{\{state\}\}">C</figure-callout>}}_7},\left(\mathrm{one}\right)$$

where K ₀ is the gain of cascade 1 in the mid-frequency range, when the influence of all capacitors can be neglected;

R ₄ , C ₇ - the resistance of the bipolar collector load 4 and the capacitance of the parasitic capacitor 7, respectively.

For the considered stages of OB (figure 2) and OE (figure 3):

$${\mathrm{<figure-callout\; id="0"\; label="K"\; filenames="00000012.png,00000014.png"\; state="\{\{state\}\}">K</figure-callout>}}_0={\mathrm{<figure-callout\; id="0"\; label="K"\; filenames="00000012.png,00000014.png"\; state="\{\{state\}\}">K</figure-callout>}}_{0.\mathrm{ABOUT}B}\approx {\mathrm{<figure-callout\; id="0"\; label="K"\; filenames="00000012.png,00000014.png"\; state="\{\{state\}\}">K</figure-callout>}}_{0.O.}\approx \frac{R_{\mathrm{four}}}{r_{\mathrm{uh}}},\left(2\right)$$

where r _e = 10 ÷ 50 Ohms is the resistance of the emitter pn junction of the output transistor of cascade 1.

Moreover, the upper cutoff frequency f _in the SHU of figure 1:

$$f_{\mathrm{at}}=\frac{\mathrm{one}}{2\pi R_{\mathrm{four}}{\mathrm{<figure-callout\; id="7"\; label="C"\; filenames="00000011.png,00000012.png"\; state="\{\{state\}\}">C</figure-callout>}}_7},\left(3\right)$$

and the gain area B _s , which determines the quality of the BC, is found as the product

λ $$B_s={\mathrm{<figure-callout\; id="0"\; label="f\; at\; K"\; filenames="00000012.png,00000014.png"\; state="\{\{state\}\}">f\; </figure-callout>}}_{\mathrm{at}}{K}_{}{}_0\frac{\mathrm{one}}{2\pi {\mathrm{<figure-callout\; id="7"\; label="r\; uh\; C"\; filenames="00000011.png,00000012.png"\; state="\{\{state\}\}">r\; </figure-callout>}}_{\mathrm{uh}}{C}_{}{}_7}.\left(\mathrm{four}\right)$$

λ

и С₇=C₁₄) площадь усиления $$B_s^{*}$$

и f_в.н возрастают:In the inventive device of figure 2 (when choosing a buffer amplifier with unity gain $${\dot{K}}_y=\mathrm{one}$$

and C ₇ = C ₁₄ ) gain area $$B_s^{*}$$

and f _vn increase:

$$B_s^{*}\approx \frac{\mathrm{one}}{2\pi r_{\mathrm{uh}}{C}_7\left(\mathrm{one}-{\alpha }_{\mathrm{eleven}}\right)}>>B_s,\left(5\right)$$

$$f_{\mathrm{at}.n}\approx \frac{\mathrm{one}}{2\pi R_{\mathrm{four}}{C}_7\left(\mathrm{one}-{\alpha }_{\mathrm{eleven}}\right)},\left(6\right)$$

where α ₁₁ ≤0.9 ÷ 0.99 is the current gain of the emitter of the additional transistor 11.

This conclusion is confirmed by the results of computer simulation:

- in the circuit SHU with OB 6, the upper cutoff frequency f _in increases in comparison with the prototype 6.3 times without deterioration K ₀ (Fig.7);

- a CC scheme with 4 OE f increases _in 3.6 times (Figure 5).

Thus, the proposed controllers solve one of the fundamental problems of modern microelectronics - expanding the operating frequency range of classical cascades with a common base and common emitter. Moreover, this effect is realized within the framework of standard, including micron technologies (for example, “silicon on an insulator”, “silicon on sapphire”, etc., on the basis of which microcircuits with increased radiation resistance and an extended temperature range are performed).

BIBLIOGRAPHIC LIST

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Claims (3)

1. A broadband amplifier based on a cascade with a common base (or common emitter), comprising an input stage (1), the control input of which (2) is connected to a signal source (3), a collector load two-terminal device (4) connected between the power supply bus ( 5) and the collector output (6) of the input stage (1), the parasitic capacitor (7) connected between the collector output (6) of the input stage (1) and the common bus (8) power supply, characterized in that the circuit introduced noninverting buffer amplifier (9), the input of which is connected to the collector output (6) the input stage (1), and the output (10) is the output of the device, and an additional transistor (11), the base of which is connected to the auxiliary voltage source (12), the collector is connected to the input of a non-inverting buffer amplifier (9), the emitter is through a current stabilizing the two-terminal network (13) is connected to a common bus of power sources (8), and the output of the device (8) is connected to the emitter of an additional transistor (11) through an additional capacitor (14). 2. A broadband amplifier based on a cascade with a common base (or common emitter) according to claim 1, characterized in that the input stage (1) is implemented according to the scheme with a common base. 3. A broadband amplifier based on a cascade with a common base (or common emitter) according to claim 1, characterized in that the input stage (1) is implemented according to the scheme with a common emitter.

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