RU2106675C1 - Programmed automatic equipment - Google Patents

Abstract

FIELD: digital automation equipment, computer engineering, in particular, control and measuring instruments, computer systems. SUBSTANCE: device is designed as programmed timing automatic system which implements control algorithms using different time delays in command transmission to multiple actuators. This device has memory unit (command register), decoder, matrix of external commands, matrix of internal commands, matrix of time intervals, timer with multiple time intervals, circuits for testing logical conditions and gates, next command code generator and program register. Matrices provide possibility to switch to different control algorithms. EFFECT: increased functional capabilities. 1 dwg

Description

 The invention relates to digital devices of automation and computer technology and can find application in control systems, control, measurement, computing and other systems of various industries.

 Known digital / finite / automata.

 The state machine is a logic converter with internal feedbacks with many inputs and many outputs. Input codes are supplied to the inputs, and output codes that control the control objects are removed from the outputs. The state of the outputs / output code / is determined by the state of the inputs / input code /, the internal state of the logic converter and the function of the outputs, which determines the state of the outputs depending on the state of the inputs and the internal state of the logic converter.

 The disadvantages of such an automaton include the inability to perform program-time control of the control object with many actuators, since the automaton provides for the formation of each output command only when the input command is received. The formation of the sequence of output commands specified by the control algorithm and launched by one start command is not performed automatically.

 Also known is a Wilks microprogrammable automaton containing an RMK micro-instruction register / memory block /, a decoder, an external micro-command matrix, an internal micro-command matrix, a next micro-command code generation matrix, and an operation register (PO). The binary code of the first microcommand in such an automaton is supplied from the register of operations of the PO to a decoder, which converts the binary code to decimal and transfers it to one of the output buses of the matrix of external microcommands and then to the actuator. When executing a microcommand, the signal from the actuator enters the matrix of internal microcommands, which transmits the signal to the matrix for generating the code of the next microcommand, which generates this code and transfers it to the register of microcommands of RMK, which stores the code and transfers it to the decoder. Next, the machine performs the next cycle of the same operations until the execution of the control algorithm of executive devices. Matrices allow you to switch between input and output buses in various ways.

 The disadvantage of such an automaton is that the duration of the command is determined by the time the code for the next command is generated or when the information about the execution of the previous command is received. This feature does not allow the use of an automatic machine for controlling actuators having different durations of operation without feedback information on the execution of commands, i.e. the machine cannot perform the functions of a program-temporary PVA machine.

 The proposed technical solution, containing a timer and a matrix of time intervals, as well as key circuits, OR circuits, and logical condition checking schemes, allows implementing control algorithms that contain different delay times for commands and their various durations.

 The use of a timer and a matrix of time intervals with its connection to the matrix of external commands and to the code generator of the next command through key circuits, OR circuits connected to circuits for checking logical conditions, was not found in other technical solutions.

 The invention is illustrated in the drawing, which shows a diagram of the software / 4 bits of the binary command code /.

 The program machine contains a command register 1 / memory block /, to the outputs of which a decoder 2 is connected. The vertical input buses of the matrix 3 of external commands are connected to the outputs of the decoder 2. The horizontal output buses of this matrix, which can be connected to any of its vertical input buses, are designed to be connected to external actuators of the control system. The matrix of external commands goes into the matrix of 4 internal commands, the vertical input buses of which are a continuation of the vertical input buses of the matrix 3 of external commands. The horizontal output buses of the matrix of 4 internal commands are designed to connect external sensors to control the execution of commands by executive devices of the control system. A matrix of time intervals 5 is superimposed on the matrix of 4 internal commands. The vertical input buses of the matrix 5 time intervals are connected to the outputs of the timer 6, to the triggering input of which / 0 / is connected the bus of the first command of the matrix of 3 external commands. The horizontal output buses of the matrix 4 of internal commands are connected directly to one of the inputs of the generator 9 of the codes or to one of the inputs of the two-input circuits for checking the logical conditions / operation of actuators / 7, to the second inputs of which are connected other corresponding horizontal buses of the matrix 4 of the internal commands. Logic condition checking circuits 7 have two outputs. One of these outputs is connected directly to one of the inputs of the code generator 9 or to one of the inputs of the two-input circuits 8, the second input of which is connected to one of the time delay output buses of the matrix 5 time intervals. The second output of the logic condition checking circuit 7 is connected to one of the inputs of two-input or multi-input OR circuits 10. The output of each of the circuits 8 is also connected to one of the inputs of the next command code generator 9 directly or through the OR circuit 10.

 Schemes 7 checking the logical conditions, schemes 8, schemes OR 10 form a logical block of the automaton 7-8-10. The register 11 of the programs is connected to the decoder 2 through the circuit OR 12.

 The outputs of the shaper 9 code of the next command are connected bitwise to the inputs of the register 1 of the team.

 The connection of the inputs and outputs of the individual elements with each other is determined by the control algorithm implemented by the machine.

 The number of bits of the code of register 1 of the command, register 11 of programs, decoder 2, driver 9 of the code for the following commands, as well as the number of circuits 7 for checking logical conditions, the number of circuits 8, circuits OR 10, and the number of matrix buses are also determined by the control algorithm. The use of matrices makes it possible to carry out various combinations of connecting their output buses to the input ones or to use additional input devices for code information, which makes it possible to reconfigure the machine for various control algorithms.

The software machine operates as follows. The start signal R, applied to one of the decimal inputs of the program register 11, generates the code of the first command, which is transmitted via the OR circuit 12 to the inputs of the decoder 2, which converts the binary code to decimal and transfers it to the corresponding output bus of the matrix 3 of external commands, which transmits command / A ₁ / to the first external actuator. Simultaneously, the matrix 4 of internal command signal is transmitted directly to the corresponding input of 9 code / if provided the algorithm / or to one of the inputs of the circuit / P _1/7 check the logical conditions and initiating input / 0 / timer 6. The timer starts counting a second time delay teams. If the second input / P ₁ / of circuit 7 from the horizontal input bus / p ₁ / of the matrix 4 of internal commands receives a signal about the execution of the command / p ₁ = 1 /, then the output "+" transfers the signal directly to the code former 9 or to one from the inputs of circuit 8, to the second input of which a signal is output from the output of / 1 / timer 6, corresponding to the delay time of the next command prescribed by the control algorithm. If the signals coincide, the signal is transmitted via the corresponding OR 10 / circuit or / directly to the input / 2 / of the driver 9 of the code for the following commands prescribed by the control algorithm. The code of the next command is transmitted in parallel or serial form to the register 1 of the commands, which transfers it through the OR circuit 12 to the decoder 2. Decoder 2 converts the binary code to decimal and transmits a signal to the corresponding input vertical bus of the matrix 3, with which the second command / A ₂ / is transmitted to the horizontal bus and to the second actuator.

If the second input of the circuit / P ₁ / for checking the logical conditions 7 from the horizontal input bus / p ₁ / of the matrix of internal commands 4 does not receive a signal about the execution of the command / p ₁ = 0 / / the command has not been executed /, then from the “-” output directly a signal is transmitted to the code shaper 9 or through the corresponding OR circuit 10 to another input of the next command code shaper 9 prescribed by the control algorithm. The code of another command is generated, which is transmitted to register 1 of the command. Further, the operation of the machine is carried out in a similar manner until all the commands prescribed by the control algorithm / A ₂ ... A _n / have been issued to the external actuators provided.

 The connection between the logic condition checking circuits 7, the circuits 8 and the OR circuits 10, as well as between the OR circuits 10 and the code generator 9 of the next command can be made in the form of matrices.

 The presence of matrices and a timer makes it possible to implement various time programs for controlling actuators by appropriate switching of the matrix buses.

 The connection of the outputs of the circuits 7 for checking the logical conditions to the inputs of the circuits AND 8, circuits OR 10, and the shaper 9 of the code for the next command corresponds to the executive devices control algorithm.

Claims (1)

 A program machine comprising a command register, a decoder, an external command matrix, an internal command matrix, a next command code generator and a program register, the outputs of the command register and program register being connected to a decoder whose outputs are connected to the input buses of the external command matrix whose output buses are intended for connecting to external actuators, the input buses of the matrix of internal commands are connected respectively to the input buses of the matrix of external commands, characterized in that it a timer with one input and at least two outputs with different time delays, a matrix of time intervals, logical condition checking circuits, key circuits and OR circuits have been introduced, and the timer is connected to the first output of the decoder by its input, and the timer outputs are connected respectively to the input buses matrix of time intervals containing at least two output buses, each of which is connected to one of the inputs of the corresponding key circuit, the number of key circuits is equal to the number of output buses of the matrix in intervals, the second input of the key circuit is connected to one of the outputs of the corresponding logical condition checking circuit, the number of which is equal to the number of input buses of the matrix of internal commands, the second outputs of one part of the logical condition checking circuits are connected to the input part of the next command code generator, the second outputs of the other part of the circuit checks of logical conditions and outputs of key circuits are connected to another part of the inputs of the code generator of the next command through OR circuits, the outputs of the code generator of the next command are connected Entries to the inputs of the command register.