RU1807448C - Program control unit - Google Patents

Abstract

The invention relates to automation and digital technology and can be used to control various groups of redundant, sequentially operating objects according to a given sequence diagram. The purpose of the invention is to expand the scope and flexible specification of time intervals for the operation of objects. The device comprises a program setting block, a reversible time counter, a pulse generator, a group of pulse distributors and registers, a decoder, a control trigger block, an input signal receiving block. When controlling a group of objects, the device provides the ability to flexibly set the time intervals of each object in the group, automatically turn on the backup object if the main object is not turned on, turn off the previous object after the time interval for its operation only after turning on the next device, 1 il.

Description

The invention relates to automation and computer engineering and can be used to control various groups of redundant devices according to a given sequence diagram.

The purpose of the invention is to expand the scope of the device by taking into account the mutual interaction of objects and the flexible setting of time intervals for the operation of objects. To this end, to a program control device comprising a program setting unit, a pulse generator, the output of which is connected to a counting input of a reversible pulse counter, a first OR element, first and second pulse distributors, an address decoder, the output group of which is connected to a group of inputs of a trigger block, respectively an input signal receiving unit, a single pulse generator, two delay elements, six blocks of AND elements,

the first and second address memory registers are two blocks of OR elements, a second OR element, and a strobe control element, the locking input of which is connected to the output of a single pulse generator and to the first input of the first OR element, the second input of which is connected to the overflow output of the reversible pulse counter and to the first inputs of the first and second blocks of AND elements, the third input of the first OR element is connected to the first output of the input signal receiving unit and to the counting input of the first pulse distributor, and the output is through the first ele ent delay - to the first inputs of the third and fourth blocks of AND gates, whose second inputs are connected to respective discharge dnym outputs of the first and second valves pulses and a group of inputs the first and second blocks of AND gates, whose outputs are connected group sootvetstel

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to groups of information inputs of the first and second registers of address memory, whose bit outputs are connected to the group of inputs of the fifth and sixth blocks of AND elements, respectively, the outputs of the fifth and sixth blocks of AND elements are connected to the first inputs of the first and second blocks of OR elements, outputs which are connected to the corresponding inputs of the address decoder, and the second inputs to the corresponding outputs of the third and fourth blocks of elements And, allowing the inputs of the fifth and sixth blocks of elements And are connected to the output about the gate of the element, the enable input of which is connected to the second output of the input signal receiving unit and to the input of the program task, the output of which is connected to the input of the reverse pulse counter, the overflow output of which through the second delay element is connected to the first input of the second OR element, the second input of which is connected to the output of the single pulse generator and with the installation input of the second pulse distributor, the counting input of which is connected to the output of the second delay element, the output of the second element And And connected to the adjusting input of the first pulse distributor.

The drawing shows a block diagram of a device for software control.

The program control device comprises a pulse generator 1, an input signal receiving unit 2, the first output of which is connected to the input of the program task unit 3, the output of which is connected to the input of the reversible time counter 4, the second input of which is connected to the output of the pulse generator 1. In addition, the device contains a delay element 5, the input of which is connected to the output of the reversible time counter 4, and the output is connected to the first input of the OR element 6, the first pulse distributor 7. whose output is connected through the first block of AND elements 8, the block of OR elements 9 to the first The input of the decoder 10, the output of which is connected to the input of the control trigger unit 11. In addition, the device contains a single pulse generator 12, the output of which is connected to the installation input of the second pulse distributor 13, the output of which through the block of elements AND 14 and the block of elements OR 15 is connected to the second input of the decoder 10. In addition, the device contains an element OR 16, element delays 17, block of elements And 18, register 19, blocks of elements And 20, 21 register 22, block of elements And 23, gate control element And 24.

The device operates as follows.

When applying voltage, the generator 12 generates a single pulse, which,

arriving at the installation inputs of the pulse distributors 7 and 13, sets them to their original state. Impulse distributors are designed as adders with installation and counting inputs, bit

0 of which corresponds to the number of backup objects for each object and the number of objects in the group. Thus, the installation of the pulse distributors 7 and 13 in the initial state corresponds to the address of the object,

5 turned on first after applying voltage to the device. From the outputs of the distributors 7 and 13 through the blocks of the elements And 8 and 14, which are unlocked by pulses from the generator 12 through the element OR 16 and the delay element 17, the address of the object passes through the blocks of the elements OR 9 and 15 to the decoder 19, from which the signal is supplied to the corresponding the trigger object of the control trigger block 11, including the specified object.

5, in block 1.1, on and off signals go to each circuit object from different outputs of the corresponding trigger, which means that. Allows you to distinguish between on and off signals. A single pulse from the generator 12 also arrives at the blocking input of the gate control element 24 and locks it. If the object is not turned on, then the block 2 of the input signal generation generate a pulse at the second output, which

5 arrives at the counting input of the pulse distributor 7 and increases by one the value of the code recorded in the distributor 7. The same pulse through the OR element 16 and the delay element 17 after some

0 time sufficient for the end of transients in the pulse distributors 7 and 13, the blocks of elements And 7 and 14 are unlocked, after which the address of the backup object is removed to turn it on. So

5, the device operates until the first object or one of its backups is turned on, after which the input signal receiving unit 2 generates a pulse at the first output, which, upon entering the task unit

.0 programs, initiates a census of the interval of operation of the first object in the reverse code to a reversible time counter 4, the second input of which receives pulses from generator 1, counting the time interval.

5 The pulse from the first output of the input signal receiving unit also arrives at the second input of the element 24, unlocking it, but does not pass further. However, all subsequent pulses arriving at the second input of element 24 will pass through it. Such

the element can be made, for example, from a delay line, an RS-trigger and an And element, the S-input of the trigger being a locking one, and the unlocking circuit consisting of series-connected delay lines, an RS-trigger (R-input and zero output) and a circuit And, moreover, the connected input of the delay line and the second input of the AND circuit are a gate input. After the time interval has elapsed, the reversible time counter 4 overflows, while the pulse from its output unlocks the blocks of elements 18 and 21, through which the address of the object currently operating in time is stored in registers 19 and 22. The same pulse through delay element 5 and element. OR 6 after some time, sufficient to rewrite the addresses of objects from the pulse distributors 7 and 13 to the first 19 and second 22 registers, it goes to the installation input of the pulse distributor 7 and to the counting input of the pulse distributor 13, as they address the next object. The pulse from the output of the reversible time counter 4 arrives through the OR element 16 and the delay element 17 to the blocks of the And 8 and 14 elements, unlocking them and skipping the object address to the decoder 10 and the control trigger block 11 to turn on the second object. The process of switching on the second object or its backup occurs similarly to switching on the first one, after which a pulse appears at the first output of the input signal receiving unit, which leads to recording on the reverse counter 4 the interval of operation of the second object in the group as described above. In addition, the pulse from the first output of the input signal receiving unit through the now open element 24 unlocks the blocks of elements 20 and 23, through which the address of the decoder 10 is transmitted to the decoder 10 from the registers 19 and 22 through the blocks of OR elements 9 and 15, from which the signal through the block of 11 triggers is applied to turn off this object.

Further, the described operation cycle of the device is repeated.

Claims (1)

SUMMARY OF THE INVENTION A program control device comprising a program setting unit, a pulse generator, the output of which is connected to a counting input of a reversible pulse counter, a first OR element, first and second pulse distributors, an address decoder, the output group of which is connected to a group of block inputs triggers, respectively, with the exception of the fact that, in order to expand the field of application and flexibly set the time intervals for the operation of objects, an input signal receiving unit, a single pulse generator, two delay elements, six are introduced into it memory blocks of AND elements, first and second address registers, two blocks of OR elements, a second OR element, and a strobe control element whose locking input is connected to the output of a single pulse generator and to the first input of the first OR element, the second input of which is connected to during the overflow of the reverse pulse counter and to the first inputs of the first and second blocks of AND elements, the third input of the first OR element is connected to the first output of the input signal receiving unit and to the counting input of the first pulse distributor, and the output, through the first delay element, to the first inputs of the third and the fourth blocks of AND elements, the second inputs of which are connected to the corresponding bit outputs of the first and second pulse distributors and the group of inputs of the first and second blocks of AND elements, the group of outputs which x are connected respectively to the groups of information inputs of the first and second registers of the address memory, the bit outputs of which are connected to the group of inputs of the fifth and sixth blocks of elements AND, respectively, the outputs of the fifth and sixth blocks of elements AND are connected to the first inputs of the first and second blocks of elements OR the outputs of which are connected to the corresponding inputs of the address decoder, and the second inputs to the corresponding outputs of the third and fourth blocks of elements AND, allowing inputs of the fifth AND sixth blocks of elements AND connected with the output of the gate control element, the resolution input of which is connected to the second output of the input signal receiving unit and the program input, the output of which is connected to the input of the reverse pulse counter, the overflow output of which is connected to the first input of the second OR element through the second delay element, the second input which is connected to the output of the single pulse generator and the installation input of the second pulse distributor, the counting input of which is connected to the output of the second delay element, the output to of the second OR element is connected to the installation input of the first pulse distributor. u