SU1522192A2 - Code comparison circuit - Google Patents

Abstract

The invention relates to automation and computing, and is intended to calculate Boolean derivatives in the design of a technical diagnostic tool. The purpose of the invention is to expand the functionality by calculating the minimized value of the Boolean derivative. To achieve this goal, a third switch is introduced into the code comparison scheme. When counting pulses are delivered, counter 3 generates a sequence of binary sets arriving at switch 4. In the group of the UNEQUAL DIFFERENCE 7 element, the second set is formed according to the set coming from counter 3 and the variable code received from input 2. At the output of the UNEQUALITY element 8, the value of the Boolean difference is generated, the minimized value of which, under the control of the enable signal from the output of the switch 6, is written to the shift register 9. 2 Il.

Description

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The invention relates to avhomatitics and computing and is intended to calculate boolean derivatives in the design of technical diagnostic tools.

The purpose of the invention is to expand the functionality by calculating the minimized value of the Boolean derivative.

Figure 1 shows the proposed code comparison scheme; figure 2 is a functional diagram of one of the options for the implementation of the third switch.

The device (Fig. 1) contains the first group, 1 inputs, the second group of 2 inputs, counter 3, three switches 4-6, the group of elements UNACTAL 7, the element UNIMAL 8, shift register 9, clock input 10, output 11. Switch 6 ( figure 2) contains 2 elements AND NOT 12.

The device works as follows.

In the initial state, the counter 3 is reset. The value of the original function on all 2 binary sets of input variables is fed to the first group of 1 inputs. The second group of 2 inputs receives an N-bit binary code that carries information about the variables for which the bulan derivative is calculated (when calculating the Boolean derivative with respect to the variable X in the i-th bit of the code - one, in the remaining bits - zeros).

When applying counting pulses to the clock input 10, the counter 3 forms a sequence of binary sets, each of which determines the value of the initial function (on the switch 4). The group of elements NECKNESS 7 on the set coming from counter 3 and the variable code coming to the second group of 2 inputs forms the second set on which the value of the function modified by variable 1 (on switch 5) is determined. At the output of the UNEQUAL VALUE element 8, the value of the Boolean derivative arrives at the information input of the shift register 9. At the same time, the binary set from counter 3 is fed to the information inputs of the switch 6, the control inputs of which are connected to the second group of 2 device inputs. If on this set the value of the i-ro bit of the counter.Z is 1, then at the output of switch 6, a signal O is generated, which is input to the write enable of the shift register 9. If on this set the value of the i-ro bit of the counter 3 takes the value O, then, at the output of the switch 6, a signal 1 is generated and the value of the Boolean derivative is written to the shift register 9, and the value of the counter 3 increases by one. After supplying 2 counting pulses, the counter 3 will assume the initial state, and in the bits of the shift register 9 the value of the Boolean difference will be recorded and the calculation process will be completed.

The device works in a similar way and when calculating the Boolean derivative with respect to several variables.

An additional effect is to reduce the bit of the shift register 9 by a factor of 2 when calculating a single Boolean derivative and 2 times when calculating an H-multiple Boolean derivative.

Claims (1)

Invention Formula Comparison of codes on auth. No. 1016778, characterized in that, with an extension chain of functional capabilities due to the calculation of the minimized value of the Boolean derivative, enter a third switch in its interface, the information inputs of which are connected to the output of the counter, the second inputs of the elements UNACTAL of the group a switch whose output is connected to the shift register write enable input. R i Kj QO " l FIG 2 .-J